summaryrefslogtreecommitdiffstats
path: root/src
Commit message (Expand)AuthorAgeFilesLines
* ureg: add generic emitters for tex and branch instructionsKeith Whitwell2009-09-122-11/+80
* tgsi/ureg: give ureg_DECL_constant an explicit index parameterKeith Whitwell2009-09-123-4/+8
* mesa: remove unused SATURATE_PLUS_MINUS_ONE flagKeith Whitwell2009-09-122-3/+0
* tgsi/ureg: VS inputs don't have any semantic tags, just an indexKeith Whitwell2009-09-124-50/+44
* tgsi: free tokens on errorKeith Whitwell2009-09-121-0/+3
* tgsi: sanity check ureg programsKeith Whitwell2009-09-121-0/+10
* tgsi: add const qualifierKeith Whitwell2009-09-122-2/+2
* r300g: There is no such thing as "texture stride"Nicolai Hähnle2009-09-126-24/+47
* i965: Move OPCODE_DDX/DDY to brw_wm_emit.c and make it actually work.Eric Anholt2009-09-115-102/+126
* r600: fix texcoords from constantsAndre Maasikas2009-09-111-40/+52
* Revert "r600: support tex coords from constants"Alex Deucher2009-09-111-17/+45
* r300g: only allocate one BO for vertex buffers, default size is 64*1024Cooper Yuan2009-09-111-35/+33
* r600: support tex coords from constantsAlex Deucher2009-09-111-45/+17
* r600: enable caching of vertex programsAndre Maasikas2009-09-116-62/+110
* llvmpipe: set dirty_render_cache in llvmpipe_clear()José Fonseca2009-09-111-0/+1
* llvmpipe: Update status in README and TODO/FIXME comments throughout the code.José Fonseca2009-09-119-36/+36
* i965: Enable loops in the VS.Eric Anholt2009-09-101-15/+38
* mesa: nicer vertex setupBrian Paul2009-09-101-128/+138
* st/mesa: use st_context() helperBrian Paul2009-09-101-17/+17
* softpipe: remove no-op softpipe_init_texture_funcs() functionBrian Paul2009-09-103-10/+0
* softpipe: remove unused #includes, move commentBrian Paul2009-09-101-7/+1
* util: remove unneeded #includesBrian Paul2009-09-101-6/+0
* softpipe: reformatting, clean-ups, commentsBrian Paul2009-09-102-15/+30
* util: minor clean-ups, reformattingBrian Paul2009-09-101-17/+12
* softpipe: remove unneeded #includesBrian Paul2009-09-102-3/+0
* Merge branch 'mesa_7_6_branch'Brian Paul2009-09-109-67/+154
|\
| * Merge branch 'mesa_7_5_branch' into mesa_7_6_branchBrian Paul2009-09-101-1/+3
| |\
| | * softpipe: minor indentation fixBrian Paul2009-09-101-1/+1
| | * softpipe: set dirty_render_cache in softpipe_clear()Brian Paul2009-09-101-0/+2
| * | intel: disable intel_stencil_drawpixels() for nowBrian Paul2009-09-101-0/+16
| * | Fix merge failIan Romanick2009-09-101-13/+0
| * | tgsi: use new tgsi_call_record to handle execution mask stacksBrian Paul2009-09-102-14/+43
| * | mesa: need to set all stencil bits to 0 before setting the 1 bitsBrian Paul2009-09-101-0/+9
| * | Merge branch 'mesa_7_5_branch' into mesa_7_6_branchIan Romanick2009-09-102-1/+6
| |\ \ | | |/
| | * intel: add B43 chipset supportZhenyu Wang2009-09-102-1/+6
| * | i965: Fix relocation delta for WM surfaces.Eric Anholt2009-09-101-1/+1
| * | mesa: in texenvprogram code, only do saturation when really needed.Brian Paul2009-09-101-8/+53
| * | gallium: Add PIPE_OS_APPLE back to auxiliary/util/u_time.h.Vinson Lee2009-09-101-1/+1
| * | radeon: Change debugging code to use macros instead of inline functions.Pauli Nieminen2009-09-102-43/+27
| * | radeon: Add more verbose error message for failed command buffer.Pauli Nieminen2009-09-091-1/+3
* | | st/xorg: rename ctx to pipe to match every other gallium state trackerZack Rusin2009-09-104-35/+35
* | | st/xorg: temporarily disablie copiesZack Rusin2009-09-101-1/+2
* | | st/xorg: implement pipelines surface/texture copiesZack Rusin2009-09-102-7/+329
* | | st/xorg: unite finalization and stub out pipelined copiesZack Rusin2009-09-104-20/+50
* | | st/xorg: abstract flushing and syncing for the exa codeZack Rusin2009-09-102-5/+23
* | | st/xorg: disable solid fills until copies are accelerated as wellZack Rusin2009-09-102-1/+3
* | | st/xorg: implement exasolids with full pipeliningZack Rusin2009-09-104-32/+135
* | | st/xorg: start adding support for surface fillsZack Rusin2009-09-105-26/+66
* | | nv50: Fix tiling mode for lower mipmap levels.Marcin Kościelnicki2009-09-103-5/+8
* | | intel: Don't forget to map the depth read buffer in spans.Eric Anholt2009-09-101-22/+28