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author | Bhanu Chetlapalli <bhanu@mips.com> | 2012-01-31 16:34:07 -0800 |
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committer | Andrew Hsieh <andrewhsieh@google.com> | 2012-06-08 15:51:42 +0800 |
commit | f15a9e8294ea7b8441415b8a45490dbfd5eb3bd5 (patch) | |
tree | 559f356741f61d59fe45158b469c0e004ed7d684 | |
parent | 47d2b2c5ffedb6b37319154137b286026eeb636c (diff) | |
download | external_qemu-f15a9e8294ea7b8441415b8a45490dbfd5eb3bd5.zip external_qemu-f15a9e8294ea7b8441415b8a45490dbfd5eb3bd5.tar.gz external_qemu-f15a9e8294ea7b8441415b8a45490dbfd5eb3bd5.tar.bz2 |
[MIPS] TLBRET_DIRTY is a valid return value from get_physical_address
Change-Id: I3ddfd3de165575c52a76cf9acee1e304d42562cf
Signed-off-by: Chris Dearman <chris@mips.com>
-rw-r--r-- | target-mips/helper.c | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/target-mips/helper.c b/target-mips/helper.c index ec87114..12caf34 100644 --- a/target-mips/helper.c +++ b/target-mips/helper.c @@ -324,7 +324,7 @@ target_phys_addr_t cpu_mips_translate_address(CPUState *env, target_ulong addres access_type = ACCESS_INT; ret = get_physical_address(env, &physical, &prot, address, rw, access_type); - if (ret != TLBRET_MATCH) { + if (ret != TLBRET_MATCH || ret != TLBRET_DIRTY) { raise_mmu_exception(env, address, rw, ret); return -1LL; } else { |