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authorJun Nakajima <jnakajim@gmail.com>2011-02-10 17:43:27 -0800
committerJun Nakajima <jnakajim@gmail.com>2011-02-10 17:43:27 -0800
commit599662dc9671378c1471ce812a415bc4274736f2 (patch)
tree36ddf8c7b8dad73f262f25b43ac028bf0f42b61c /COPYING
parent752e385393d3d2239bb8cf9c8caf3cdd6b5e7a68 (diff)
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x86: Add the SSSE3 feature to CPU emulation. Gcc can emit SSSE3
instructions for optimization purposes. Change-Id: I33ece4f4655d50cbee7fc536ec1ac09218c0ad13 Signed-off-by: Jun Nakajima <jun.nakajima@intel.com> Signed-off-by: Bruce Beare <bruce.j.beare@intel.com>
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