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authorDavid Turner <digit@android.com>2010-09-10 14:31:22 +0200
committerDavid 'Digit' Turner <digit@android.com>2010-09-13 00:30:35 -0700
commit5fbe340e4937c4df99b1064178076a85e341ca89 (patch)
tree5a9ebd3d3c150c38a844d1c535197a0a6038af03 /cpu-defs.h
parent24cd25ab654ab829ba8e9c0c634db50ed28f325a (diff)
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upstream: cpu changes.
Diffstat (limited to 'cpu-defs.h')
-rw-r--r--cpu-defs.h42
1 files changed, 27 insertions, 15 deletions
diff --git a/cpu-defs.h b/cpu-defs.h
index 7fdbe97..8d4bf86 100644
--- a/cpu-defs.h
+++ b/cpu-defs.h
@@ -72,10 +72,11 @@ typedef uint64_t target_ulong;
#define TB_JMP_ADDR_MASK (TB_JMP_PAGE_SIZE - 1)
#define TB_JMP_PAGE_MASK (TB_JMP_CACHE_SIZE - TB_JMP_PAGE_SIZE)
+#if !defined(CONFIG_USER_ONLY)
#define CPU_TLB_BITS 8
#define CPU_TLB_SIZE (1 << CPU_TLB_BITS)
-#if TARGET_PHYS_ADDR_BITS == 32 && TARGET_LONG_BITS == 32
+#if HOST_LONG_BITS == 32 && TARGET_LONG_BITS == 32
#define CPU_TLB_ENTRY_BITS 4
#else
#define CPU_TLB_ENTRY_BITS 5
@@ -91,21 +92,32 @@ typedef struct CPUTLBEntry {
target_ulong addr_read;
target_ulong addr_write;
target_ulong addr_code;
- /* Addend to virtual address to get physical address. IO accesses
+ /* Addend to virtual address to get host address. IO accesses
use the corresponding iotlb value. */
-#if TARGET_PHYS_ADDR_BITS == 64
- /* on i386 Linux make sure it is aligned */
- target_phys_addr_t addend __attribute__((aligned(8)));
-#else
- target_phys_addr_t addend;
-#endif
+ unsigned long addend;
/* padding to get a power of two size */
uint8_t dummy[(1 << CPU_TLB_ENTRY_BITS) -
(sizeof(target_ulong) * 3 +
- ((-sizeof(target_ulong) * 3) & (sizeof(target_phys_addr_t) - 1)) +
- sizeof(target_phys_addr_t))];
+ ((-sizeof(target_ulong) * 3) & (sizeof(unsigned long) - 1)) +
+ sizeof(unsigned long))];
} CPUTLBEntry;
+extern int CPUTLBEntry_wrong_size[sizeof(CPUTLBEntry) == (1 << CPU_TLB_ENTRY_BITS) ? 1 : -1];
+
+#define CPU_COMMON_TLB \
+ /* The meaning of the MMU modes is defined in the target code. */ \
+ CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
+ target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
+ target_ulong tlb_flush_addr; \
+ target_ulong tlb_flush_mask;
+
+#else
+
+#define CPU_COMMON_TLB
+
+#endif
+
+
#ifdef HOST_WORDS_BIGENDIAN
typedef struct icount_decr_u16 {
uint16_t high;
@@ -120,6 +132,7 @@ typedef struct icount_decr_u16 {
struct kvm_run;
struct KVMState;
+struct qemu_work_item;
typedef struct CPUBreakpoint {
target_ulong pc;
@@ -146,13 +159,9 @@ typedef struct CPUWatchpoint {
target_ulong mem_io_vaddr; /* target virtual addr at which the \
memory was accessed */ \
uint32_t halted; /* Nonzero if the CPU is in suspend state */ \
- uint32_t stop; /* Stop request */ \
- uint32_t stopped; /* Artificially stopped */ \
uint32_t interrupt_request; \
volatile sig_atomic_t exit_request; \
- /* The meaning of the MMU modes is defined in the target code. */ \
- CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \
- target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \
+ CPU_COMMON_TLB \
struct TranslationBlock *tb_jmp_cache[TB_JMP_CACHE_SIZE]; \
/* buffer for temporaries in the code generator */ \
long temp_buf[CPU_TEMP_BUF_NLONGS]; \
@@ -192,8 +201,11 @@ typedef struct CPUWatchpoint {
void *opaque; \
\
uint32_t created; \
+ uint32_t stop; /* Stop request */ \
+ uint32_t stopped; /* Artificially stopped */ \
struct QemuThread *thread; \
struct QemuCond *halt_cond; \
+ struct qemu_work_item *queued_work_first, *queued_work_last; \
const char *cpu_model_str; \
struct KVMState *kvm_state; \
struct kvm_run *kvm_run; \