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author | Jiang, Yunhong <yunhong.jiang@intel.com> | 2012-04-01 09:35:06 +0800 |
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committer | Jiang, Yunhong <yunhong.jiang@intel.com> | 2012-04-07 23:36:40 +0800 |
commit | e8bca780fc70318f38cab5bc38e5abdee60375da (patch) | |
tree | 3d0ab3aca8a01eb1a51571682059ca4e8ff9b746 /hw/goldfish_pipe.h | |
parent | f597bde4b03c8732013c673ca920599d1ee3160d (diff) | |
download | external_qemu-e8bca780fc70318f38cab5bc38e5abdee60375da.zip external_qemu-e8bca780fc70318f38cab5bc38e5abdee60375da.tar.gz external_qemu-e8bca780fc70318f38cab5bc38e5abdee60375da.tar.bz2 |
Add qemu pipe access with parameter
The following changes are crucial for GPU H/W acceleration because
some graphics applications like games perform very frequent QEMU pipe
operations to send GLES commands to the host translator.
For each read/write buffer operation, currently QEMU pipe requires five
MMIO operations.
This causes significant overhead when running with hardware virtualization
enabled (e.g. HAXM) because each MMIO causes expensive transition from
the guest kernel to the kernel driver, and to the QEMU user space in the end.
Among such five MMIO accesses, four of them are required to just set up the
parameters for the access, like the buffer address, length etc. By passing
a buffer containing such parameters, we need only one MMIO operation to
send a GLES command to the host translator.
Update the qemu_pipe save version for pipe struct changes.
Change-Id: Idf6400f3c4c9c8473311312bb1d8f3ea92d68797
Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com>
Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com>
Signed-off-by: Nakajima, Jun <jun.nakajima@intel.com>
Diffstat (limited to 'hw/goldfish_pipe.h')
-rw-r--r-- | hw/goldfish_pipe.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/hw/goldfish_pipe.h b/hw/goldfish_pipe.h index f08cef8..10efa96 100644 --- a/hw/goldfish_pipe.h +++ b/hw/goldfish_pipe.h @@ -153,6 +153,11 @@ extern void goldfish_pipe_wake( void* hwpipe, unsigned flags ); #define PIPE_REG_SIZE 0x0c /* read/write: buffer size */ #define PIPE_REG_ADDRESS 0x10 /* write: physical address */ #define PIPE_REG_WAKES 0x14 /* read: wake flags */ +/* read/write: parameter buffer address */ +#define PIPE_REG_PARAMS_ADDR_LOW 0x18 +#define PIPE_REG_PARAMS_ADDR_HIGH 0x1c +/* write: access with paremeter buffer */ +#define PIPE_REG_ACCESS_PARAMS 0x20 /* list of commands for PIPE_REG_COMMAND */ #define PIPE_CMD_OPEN 1 /* open new channel */ @@ -189,4 +194,14 @@ extern void goldfish_pipe_wake( void* hwpipe, unsigned flags ); void pipe_dev_init(void); +struct access_params{ + uint32_t channel; + uint32_t size; + uint32_t address; + uint32_t cmd; + uint32_t result; + /* reserved for future extension */ + uint32_t flags; +}; + #endif /* _HW_GOLDFISH_PIPE_H */ |