diff options
author | Bhanu Chetlapalli <bhanu@mips.com> | 2012-01-31 16:25:04 -0800 |
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committer | Bhanu Chetlapalli <bhanu@mips.com> | 2012-01-31 16:25:04 -0800 |
commit | 409c7b66435cf5947cab6bf0710f92507317f22e (patch) | |
tree | e86657ee8a018de84833634fa425c52e8404f565 /hw/mips.h | |
parent | 828b135787a028f6befe56470e7233329cc45e3f (diff) | |
download | external_qemu-409c7b66435cf5947cab6bf0710f92507317f22e.zip external_qemu-409c7b66435cf5947cab6bf0710f92507317f22e.tar.gz external_qemu-409c7b66435cf5947cab6bf0710f92507317f22e.tar.bz2 |
[MIPS] Import MIPS target support
From v0.12.5 tag at git://git.sv.gnu.org/qemu.git
CommitID: 174f225e9d62e8f3002e274e4f718bd2a967fbf4
Change-Id: I35b49a4319cee4b69cf9da4e5af1f43327e21056
Signed-off-by: Chris Dearman <chris@mips.com>
Diffstat (limited to 'hw/mips.h')
-rw-r--r-- | hw/mips.h | 43 |
1 files changed, 43 insertions, 0 deletions
diff --git a/hw/mips.h b/hw/mips.h new file mode 100644 index 0000000..5fd72bb --- /dev/null +++ b/hw/mips.h @@ -0,0 +1,43 @@ +#ifndef HW_MIPS_H +#define HW_MIPS_H +/* Definitions for mips board emulation. */ + +/* gt64xxx.c */ +PCIBus *pci_gt64120_init(qemu_irq *pic); + +/* ds1225y.c */ +void *ds1225y_init(target_phys_addr_t mem_base, const char *filename); +void ds1225y_set_protection(void *opaque, int protection); + +/* g364fb.c */ +int g364fb_mm_init(target_phys_addr_t vram_base, + target_phys_addr_t ctrl_base, int it_shift, + qemu_irq irq); + +/* mipsnet.c */ +void mipsnet_init(int base, qemu_irq irq, NICInfo *nd); + +/* jazz_led.c */ +extern void jazz_led_init(target_phys_addr_t base); + +/* mips_int.c */ +extern void cpu_mips_irq_init_cpu(CPUState *env); + +/* mips_timer.c */ +extern void cpu_mips_clock_init(CPUState *); + +/* rc4030.c */ +typedef struct rc4030DMAState *rc4030_dma; +void rc4030_dma_memory_rw(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write); +void rc4030_dma_read(void *dma, uint8_t *buf, int len); +void rc4030_dma_write(void *dma, uint8_t *buf, int len); + +void *rc4030_init(qemu_irq timer, qemu_irq jazz_bus, + qemu_irq **irqs, rc4030_dma **dmas); + +/* dp8393x.c */ +void dp83932_init(NICInfo *nd, target_phys_addr_t base, int it_shift, + qemu_irq irq, void* mem_opaque, + void (*memory_rw)(void *opaque, target_phys_addr_t addr, uint8_t *buf, int len, int is_write)); + +#endif |