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authorBhanu Chetlapalli <bhanu@mips.com>2012-01-31 16:26:04 -0800
committerBhanu Chetlapalli <bhanu@mips.com>2012-01-31 16:51:37 -0800
commit325e19d19ff9e1fc9c6acb12eeb754563fc2e251 (patch)
treea7cfa3b5eb666b9aefac8f8d38f2d6fe6dc92164 /hw
parent409c7b66435cf5947cab6bf0710f92507317f22e (diff)
downloadexternal_qemu-325e19d19ff9e1fc9c6acb12eeb754563fc2e251.zip
external_qemu-325e19d19ff9e1fc9c6acb12eeb754563fc2e251.tar.gz
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[MIPS] Tweak MIPS support to work in Android qemu framework
Change-Id: Icd617cb91fe87a6f88566dd57b6405b216ca3570 Signed-off-by: Chris Dearman <chris@mips.com>
Diffstat (limited to 'hw')
-rw-r--r--hw/mips_timer.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/hw/mips_timer.c b/hw/mips_timer.c
index bb3c3e4..6bae90b 100644
--- a/hw/mips_timer.c
+++ b/hw/mips_timer.c
@@ -103,7 +103,7 @@ static void mips_timer_cb (void *opaque)
void cpu_mips_clock_init (CPUState *env)
{
- env->timer = qemu_new_timer(vm_clock, &mips_timer_cb, env);
+ env->timer = qemu_new_timer_ns(vm_clock, &mips_timer_cb, env);
env->CP0_Compare = 0;
cpu_mips_store_count(env, 1);
}