Add support for tracing Java method entry/exit to qemu.

This is part of a larger change to add support for tracing Java methods.
There is also a kernel change and a small change to the Dalvik interpreter
that will be checked in separately.
There used to be support for tracing Java methods but it relied on trapping
every store and checking if the store address matched a special "magic"
region (and that stopped working because we can no longer trap on loads
and stores).  The new approach uses a memory-mapped page to catch stores to
just that page.

4 files changed, 35 insertions, 19 deletions

diff --git a/hw/android_arm.c b/hw/android_arm.c
index ae21be8..b178dad 100644
--- a/hw/android_arm.c
+++ b/hw/android_arm.c
@@ -39,12 +39,6 @@ static struct goldfish_device nand_device = {
     .size = 0x1000
 };
 
-static struct goldfish_device trace_device = {
-    .name = "qemu_trace",
-    .id = -1,
-    .size = 0x1000
-};
-
 /* Board init.  */
 
 #define TEST_SWITCH 1
@@ -138,9 +132,8 @@ static void android_arm_init(ram_addr_t ram_size, int vga_ram_size,
 #endif
 #ifdef CONFIG_TRACE
     extern const char *trace_filename;
-    if(trace_filename != NULL) {
-        goldfish_add_device_no_io(&trace_device);
-        trace_dev_init(trace_device.base);
+    if (trace_filename != NULL) {
+        trace_dev_init();
     }
 #endif
 
diff --git a/hw/goldfish_device.h b/hw/goldfish_device.h
index abe102e..d04a166 100644
--- a/hw/goldfish_device.h
+++ b/hw/goldfish_device.h
@@ -51,7 +51,7 @@ void *goldfish_switch_add(char *name, uint32_t (*writefn)(void *opaque, uint32_t
 void goldfish_switch_set_state(void *opaque, uint32_t state);
 
 // these do not add a device
-void trace_dev_init(uint32_t base);
+void trace_dev_init();
 void events_dev_init(uint32_t base, qemu_irq irq);
 void nand_dev_init(uint32_t base);
 
diff --git a/hw/goldfish_trace.c b/hw/goldfish_trace.c
index ad0eba5..a9f6437 100644
--- a/hw/goldfish_trace.c
+++ b/hw/goldfish_trace.c
@@ -42,7 +42,7 @@ static void trace_dev_write(void *opaque, target_phys_addr_t offset, uint32_t va
 {
     trace_dev_state *s = (trace_dev_state *)opaque;
 
-    offset -= s->base;
+    offset -= s->dev.base;
     switch (offset >> 2) {
     case TRACE_DEV_REG_SWITCH:  // context switch, switch to pid
         trace_switch(value);
@@ -202,8 +202,19 @@ static void trace_dev_write(void *opaque, target_phys_addr_t offset, uint32_t va
         trace_munmap(unmap_start, value);
         break;
 
+    case TRACE_DEV_REG_METHOD_ENTRY:
+    case TRACE_DEV_REG_METHOD_EXIT:
+    case TRACE_DEV_REG_METHOD_EXCEPTION:
+        if (tracing) {
+            int call_type = (offset - 4096) >> 2;
+            trace_interpreted_method(value, call_type);
+        }
+        break;
+
     default:
-        cpu_abort(cpu_single_env, "trace_dev_write: Bad offset %x\n", offset);
+        if (offset < 4096) {
+            cpu_abort(cpu_single_env, "trace_dev_write: Bad offset %x\n", offset);
+        }
         break;
     }
 }
@@ -213,12 +224,14 @@ static uint32_t trace_dev_read(void *opaque, target_phys_addr_t offset)
 {
     trace_dev_state *s = (trace_dev_state *)opaque;
 
-    offset -= s->base;
+    offset -= s->dev.base;
     switch (offset >> 2) {
     case TRACE_DEV_REG_ENABLE:          // tracing enable
         return tracing;
     default:
-        cpu_abort(cpu_single_env, "trace_dev_read: Bad offset %x\n", offset);
+        if (offset < 4096) {
+            cpu_abort(cpu_single_env, "trace_dev_read: Bad offset %x\n", offset);
+        }
         return 0;
     }
     return 0;
@@ -237,15 +250,20 @@ static CPUWriteMemoryFunc *trace_dev_writefn[] = {
 };
 
 /* initialize the trace device */
-void trace_dev_init(uint32_t base)
+void trace_dev_init()
 {
     int iomemtype;
     trace_dev_state *s;
 
     s = (trace_dev_state *)qemu_mallocz(sizeof(trace_dev_state));
-    iomemtype = cpu_register_io_memory(0, trace_dev_readfn, trace_dev_writefn, s);
-    cpu_register_physical_memory(base, 0x00000fff, iomemtype);
-    s->base = base;
+    s->dev.name = "qemu_trace";
+    s->dev.id = -1;
+    s->dev.base = 0;       // will be allocated dynamically
+    s->dev.size = 0x2000;
+    s->dev.irq = 0;
+    s->dev.irq_count = 0;
+
+    goldfish_device_add(&s->dev, trace_dev_readfn, trace_dev_writefn, s);
 
     path[0] = arg[0] = '\0';
 }
diff --git a/hw/goldfish_trace.h b/hw/goldfish_trace.h
index 44190ee..c49745b 100644
--- a/hw/goldfish_trace.h
+++ b/hw/goldfish_trace.h
@@ -12,6 +12,8 @@
 #ifndef _TRACE_DEV_H_
 #define _TRACE_DEV_H_
 
+#include "goldfish_device.h"
+
 #define CLIENT_PAGE_SIZE        4096
 
 /* trace device registers */
@@ -41,10 +43,13 @@
 #define TRACE_DEV_REG_PRINT_NUM_HEX     62
 #define TRACE_DEV_REG_STOP_EMU          90
 #define TRACE_DEV_REG_ENABLE            100
+#define TRACE_DEV_REG_METHOD_ENTRY      1024
+#define TRACE_DEV_REG_METHOD_EXIT       1025
+#define TRACE_DEV_REG_METHOD_EXCEPTION  1026
 
 /* the virtual trace device state */
 typedef struct {
-    uint32_t base;
+    struct goldfish_device dev;
 } trace_dev_state;
 
 /*