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| author | Bhanu Chetlapalli <bhanu@mips.com> | 2012-05-08 17:16:03 -0700 |
|---|---|---|
| committer | Bhanu Chetlapalli <bhanu@mips.com> | 2012-06-07 13:46:03 -0700 |
| commit | 741dc13597ac064e6a48bb2a6ec069cbc1cd0dbb (patch) | |
| tree | 7e0851da5038a2579bc1270e6d3d1c899703ced7 /softmmu_outside_jit.h | |
| parent | cf9ba9a06006592bf47ce5837188986172e1a925 (diff) | |
| download | external_qemu-741dc13597ac064e6a48bb2a6ec069cbc1cd0dbb.zip external_qemu-741dc13597ac064e6a48bb2a6ec069cbc1cd0dbb.tar.gz external_qemu-741dc13597ac064e6a48bb2a6ec069cbc1cd0dbb.tar.bz2 | |
[MIPS] Add Goldfish target support
Basic Goldfish support for MIPS.
Also, Fix host CPU consumption when guest is idle
When the CPU is in wait state, do not wake-up if an interrupt can't be
taken. This avoid host CPU running at 100% if a device (e.g. timer) has
an interrupt line left enabled.
Also factorize code to check if interrupts are enabled in
cpu_mips_hw_interrupts_pending().
CPU consumption based on a patch from
Edgar E. Iglesias <edgar.iglesias@gmail.com>
Change-Id: Ie8371c8d0c9af1e0c8ba4cac419979350de0f5d9
Signed-off-by: yajin <yajin@mips.com.cm>
Signed-off-by: Douglas Leung <douglas@mips.com>
Signed-off-by: Bhanu Chetlapalli <bhanu@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
Diffstat (limited to 'softmmu_outside_jit.h')
| -rw-r--r-- | softmmu_outside_jit.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/softmmu_outside_jit.h b/softmmu_outside_jit.h index 07ba4c7..21ead05 100644 --- a/softmmu_outside_jit.h +++ b/softmmu_outside_jit.h @@ -49,7 +49,11 @@ void REGPARM __stq_outside_jit(target_ulong addr, uint64_t val, int mmu_idx); // ============================================================================= // Generate ld/stx_user // ============================================================================= +#if defined(TARGET_MIPS) +#define MEMSUFFIX MMU_MODE2_SUFFIX +#else #define MEMSUFFIX MMU_MODE1_SUFFIX +#endif #define ACCESS_TYPE 1 #define DATA_SIZE 1 |