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authorJiang, Yunhong <yunhong.jiang@intel.com>2012-04-01 10:01:33 +0800
committerJiang, Yunhong <yunhong.jiang@intel.com>2012-04-07 22:47:58 +0800
commitfba19d9f0bf94a11e87dd09e230b621025436b76 (patch)
tree12996af5393acadd815968018969e365939c1b9d /target-i386/hax-interface.h
parent8a539eaab40dc7a8047dbf97c081467029e6c518 (diff)
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Add fast mmio support
In HAXM 1.0, HAXM driver utilizes QEMU to decode and emulate MMIO accesses. This simplified the HAXM driver implementation. However, decoding in QEMU is slow because QEMU needs to sync with the HAXM driver regarding the vCPU state, guest page tables, etc. Newer HAXM driver will decode some MMIO instructions, and QEMU will get the decoded instruction information like the physical address, access direction etc, and then invoke the MMIO handler directly. This boosts MMIO handling performance significantly, thus performance of 2D/3D games because they performance very frequent MMIO access for GLES commands to the host translator. Change-Id: Ida308b2e6da3697ee37a1b28a9645916e104d9ff Signed-off-by: Xin, Xiaohui <xiaohui.xin@intel.com> Signed-off-by: Jiang, Yunhong <yunhong.jiang@intel.com> Signed-off-by: Nakajima, Jun <jun.nakajima@intel.com>
Diffstat (limited to 'target-i386/hax-interface.h')
-rw-r--r--target-i386/hax-interface.h24
1 files changed, 24 insertions, 0 deletions
diff --git a/target-i386/hax-interface.h b/target-i386/hax-interface.h
index cb6d7c8..22d4acc 100644
--- a/target-i386/hax-interface.h
+++ b/target-i386/hax-interface.h
@@ -316,6 +316,14 @@ enum exit_status {
* Now the vcpu is only paused when to be destroid, so simply return to hax
*/
HAX_EXIT_PAUSED,
+ /* from API 2.0 */
+ /*
+ * In API 1.0, HAXM driver utilizes QEMU to decode and emulate MMIO
+ * operations.
+ * From 2.0, HAXM driver will decode some MMIO instructions to improve
+ * MMIO handling performance, especially for GLES hardware acceleration
+ */
+ HAX_EXIT_FAST_MMIO,
};
/*
@@ -391,4 +399,20 @@ struct hax_capabilityinfo
uint64_t mem_quota;
};
+/* API 2.0 */
+
+struct hax_fastmmio
+{
+ uint64_t gpa;
+ uint64_t value;
+ uint8_t size;
+ uint8_t direction;
+ uint16_t reg_index;
+ uint32_t pad0;
+ uint64_t _cr0;
+ uint64_t _cr2;
+ uint64_t _cr3;
+ uint64_t _cr4;
+};
+
#endif