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authorDavid 'Digit' Turner <digit@android.com>2011-02-07 18:10:54 +0100
committerDavid 'Digit' Turner <digit@android.com>2011-02-10 00:32:24 +0100
commita39b10bd2574825a815d6ad854499dd127cfa9cb (patch)
tree71828121f6cffac487395f3ee306512bd0375bee /target-i386
parent1b0e2cf0d8b9b95ca2615adcc30dad4c481b88fc (diff)
downloadexternal_qemu-a39b10bd2574825a815d6ad854499dd127cfa9cb.zip
external_qemu-a39b10bd2574825a815d6ad854499dd127cfa9cb.tar.gz
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Build arm and x86 binaries at the same time.
Change-Id: I105c5a097c988cb964b47b40b71c7a08af0d9210
Diffstat (limited to 'target-i386')
-rw-r--r--target-i386/cpu.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/target-i386/cpu.h b/target-i386/cpu.h
index 4e7eb58..88547cb 100644
--- a/target-i386/cpu.h
+++ b/target-i386/cpu.h
@@ -181,7 +181,7 @@
#define HF2_VINTR_SHIFT 3 /* value of V_INTR_MASKING bit */
#define HF2_GIF_MASK (1 << HF2_GIF_SHIFT)
-#define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)
+#define HF2_HIF_MASK (1 << HF2_HIF_SHIFT)
#define HF2_NMI_MASK (1 << HF2_NMI_SHIFT)
#define HF2_VINTR_MASK (1 << HF2_VINTR_SHIFT)
@@ -409,7 +409,7 @@
#define CPUID_VENDOR_INTEL_3 0x6c65746e /* "ntel" */
#define CPUID_VENDOR_AMD_1 0x68747541 /* "Auth" */
-#define CPUID_VENDOR_AMD_2 0x69746e65 /* "enti" */
+#define CPUID_VENDOR_AMD_2 0x69746e65 /* "enti" */
#define CPUID_VENDOR_AMD_3 0x444d4163 /* "cAMD" */
#define CPUID_MWAIT_IBE (1 << 1) /* Interrupts can exit capability */