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| author | Chris Dearman <chris@mips.com> | 2012-08-03 14:35:52 -0700 |
|---|---|---|
| committer | Raghu Gandham <raghu@mips.com> | 2012-08-13 17:12:26 -0700 |
| commit | 55ff318b4e5382074e2049c996cb6df1041aff1b (patch) | |
| tree | 2bf906056a890d5ec97faf2a1f53db1083a0be12 /target-mips/translate.c | |
| parent | 1f1e03b62e23620975b215f77f745744426764e9 (diff) | |
| download | external_qemu-55ff318b4e5382074e2049c996cb6df1041aff1b.zip external_qemu-55ff318b4e5382074e2049c996cb6df1041aff1b.tar.gz external_qemu-55ff318b4e5382074e2049c996cb6df1041aff1b.tar.bz2 | |
[MIPS] Speed up software refill handler
Emulating each instruction of the software refill handler
has a significant impact on the overall performance of QEMU because
of the overhead of emulating the various CP0 instructions to accurately
reflect the machine state. Running the software TLB handler takes
the equivalent of 1000's of machine cycles.
This patch implements a pseudo hardware TLB refill handler
that significantly reduces the impact of refilling the TLB
to bring it more inline with what would be observed on a real target.
Signed-off-by: Steven Hill <sjhill@mips.com>
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Yajin <yajin@mips.com.cn>
Diffstat (limited to 'target-mips/translate.c')
| -rw-r--r-- | target-mips/translate.c | 1 |
1 files changed, 0 insertions, 1 deletions
diff --git a/target-mips/translate.c b/target-mips/translate.c index 853aafd..27a8df7 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -8675,7 +8675,6 @@ void cpu_reset (CPUMIPSState *env) } env->active_tc.PC = (int32_t)0xBFC00000; env->CP0_Random = env->tlb->nb_tlb - 1; - env->tlb->tlb_in_use = env->tlb->nb_tlb; env->CP0_Wired = 0; /* SMP not implemented */ env->CP0_EBase = 0x80000000; |