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authorDavid 'Digit' Turner <digit@google.com>2009-10-05 14:06:05 -0700
committerDavid 'Digit' Turner <digit@google.com>2009-10-05 14:06:05 -0700
commitddf49e53df97a349f42c733059165dc73c9907dc (patch)
tree94f840eab7a00cb543b37e1ab9086bc26df5245e /tcg/i386
parentacbee3546b9a380a4eb33daef3dccfac87c56b0b (diff)
downloadexternal_qemu-ddf49e53df97a349f42c733059165dc73c9907dc.zip
external_qemu-ddf49e53df97a349f42c733059165dc73c9907dc.tar.gz
external_qemu-ddf49e53df97a349f42c733059165dc73c9907dc.tar.bz2
Workaround ARMv7 emulation issues.
This patch is used to disable the code generator's liveness analysis pass when we emulate an ARMv7 CPU. This is required to properly run the dex preoptimization pass during the build of -user system images. Also includes: - a fix for a sad typo in target-arm/translate.c related to NEON instruction emulation - upstream improvements to the x86 and x86_64 backends to generate better goto branches at runtime - upstream fixes for 64-bit swap and shift operations in TCG After this patch is applied, re-enabling the ARMv7 memcpy should allow to run the dex preopt pass succesfully. Anything else is untested though. WE STILL NEED TO FIX THE CODE GENERATOR.
Diffstat (limited to 'tcg/i386')
-rw-r--r--tcg/i386/tcg-target.c30
1 files changed, 21 insertions, 9 deletions
diff --git a/tcg/i386/tcg-target.c b/tcg/i386/tcg-target.c
index e0fd434..e748ba2 100644
--- a/tcg/i386/tcg-target.c
+++ b/tcg/i386/tcg-target.c
@@ -276,11 +276,23 @@ static inline void tcg_out_st(TCGContext *s, TCGType type, int arg,
tcg_out_modrm_offset(s, 0x89, arg, arg1, arg2);
}
-static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
+static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val, int cf)
{
- if (val == (int8_t)val) {
+ if (!cf && ((c == ARITH_ADD && val == 1) || (c == ARITH_SUB && val == -1))) {
+ /* inc */
+ tcg_out_opc(s, 0x40 + r0);
+ } else if (!cf && ((c == ARITH_ADD && val == -1) || (c == ARITH_SUB && val == 1))) {
+ /* dec */
+ tcg_out_opc(s, 0x48 + r0);
+ } else if (val == (int8_t)val) {
tcg_out_modrm(s, 0x83, c, r0);
tcg_out8(s, val);
+ } else if (c == ARITH_AND && val == 0xffu && r0 < 4) {
+ /* movzbl */
+ tcg_out_modrm(s, 0xb6 | P_EXT, r0, r0);
+ } else if (c == ARITH_AND && val == 0xffffu) {
+ /* movzwl */
+ tcg_out_modrm(s, 0xb7 | P_EXT, r0, r0);
} else {
tcg_out_modrm(s, 0x81, c, r0);
tcg_out32(s, val);
@@ -290,7 +302,7 @@ static inline void tgen_arithi(TCGContext *s, int c, int r0, int32_t val)
static void tcg_out_addi(TCGContext *s, int reg, tcg_target_long val)
{
if (val != 0)
- tgen_arithi(s, ARITH_ADD, reg, val);
+ tgen_arithi(s, ARITH_ADD, reg, val, 0);
}
static void tcg_out_jxx(TCGContext *s, int opc, int label_index)
@@ -338,7 +350,7 @@ static void tcg_out_brcond(TCGContext *s, int cond,
/* test r, r */
tcg_out_modrm(s, 0x85, arg1, arg1);
} else {
- tgen_arithi(s, ARITH_CMP, arg1, arg2);
+ tgen_arithi(s, ARITH_CMP, arg1, arg2, 0);
}
} else {
tcg_out_modrm(s, 0x01 | (ARITH_CMP << 3), arg2, arg1);
@@ -951,7 +963,7 @@ static inline void tcg_out_op(TCGContext *s, int opc,
c = ARITH_ADD;
gen_arith:
if (const_args[2]) {
- tgen_arithi(s, c, args[0], args[2]);
+ tgen_arithi(s, c, args[0], args[2], 0);
} else {
tcg_out_modrm(s, 0x01 | (c << 3), args[2], args[0]);
}
@@ -1009,21 +1021,21 @@ static inline void tcg_out_op(TCGContext *s, int opc,
case INDEX_op_add2_i32:
if (const_args[4])
- tgen_arithi(s, ARITH_ADD, args[0], args[4]);
+ tgen_arithi(s, ARITH_ADD, args[0], args[4], 1);
else
tcg_out_modrm(s, 0x01 | (ARITH_ADD << 3), args[4], args[0]);
if (const_args[5])
- tgen_arithi(s, ARITH_ADC, args[1], args[5]);
+ tgen_arithi(s, ARITH_ADC, args[1], args[5], 1);
else
tcg_out_modrm(s, 0x01 | (ARITH_ADC << 3), args[5], args[1]);
break;
case INDEX_op_sub2_i32:
if (const_args[4])
- tgen_arithi(s, ARITH_SUB, args[0], args[4]);
+ tgen_arithi(s, ARITH_SUB, args[0], args[4], 1);
else
tcg_out_modrm(s, 0x01 | (ARITH_SUB << 3), args[4], args[0]);
if (const_args[5])
- tgen_arithi(s, ARITH_SBB, args[1], args[5]);
+ tgen_arithi(s, ARITH_SBB, args[1], args[5], 1);
else
tcg_out_modrm(s, 0x01 | (ARITH_SBB << 3), args[5], args[1]);
break;