Workaround ARMv7 emulation issues.

This patch is used to disable the code generator's liveness analysis pass when we
emulate an ARMv7 CPU. This is required to properly run the dex preoptimization pass
during the build of -user system images.

Also includes:
- a fix for a sad typo in target-arm/translate.c related to NEON instruction emulation
- upstream improvements to the x86 and x86_64 backends to generate better goto branches at runtime
- upstream fixes for 64-bit swap and shift operations in TCG

After this patch is applied, re-enabling the ARMv7 memcpy should allow to run the dex preopt
pass succesfully. Anything else is untested though. WE STILL NEED TO FIX THE CODE GENERATOR.

1 files changed, 5 insertions, 6 deletions

diff --git a/tcg/tcg-op.h b/tcg/tcg-op.h
index daeb025..7cb6934 100644
--- a/tcg/tcg-op.h
+++ b/tcg/tcg-op.h
@@ -1441,9 +1441,8 @@ static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
 #ifdef TCG_TARGET_HAS_bswap64_i64
     tcg_gen_op2_i64(INDEX_op_bswap64_i64, ret, arg);
 #else
-    TCGv_i32 t0, t1;
-    t0 = tcg_temp_new_i32();
-    t1 = tcg_temp_new_i32();
+    TCGv_i64 t0 = tcg_temp_new_i64();
+    TCGv_i64 t1 = tcg_temp_new_i64();
     
     tcg_gen_shli_i64(t0, arg, 56);
     
@@ -1473,8 +1472,8 @@ static inline void tcg_gen_bswap64_i64(TCGv_i64 ret, TCGv_i64 arg)
 
     tcg_gen_shri_i64(t1, arg, 56);
     tcg_gen_or_i64(ret, t0, t1);
-    tcg_temp_free_i32(t0);
-    tcg_temp_free_i32(t1);
+    tcg_temp_free_i64(t0);
+    tcg_temp_free_i64(t1);
 #endif
 }
 
@@ -1749,7 +1748,7 @@ static inline void tcg_gen_rotr_i64(TCGv_i64 ret, TCGv_i64 arg1, TCGv_i64 arg2)
 
     t0 = tcg_temp_new_i64();
     t1 = tcg_temp_new_i64();
-    tcg_gen_shl_i64(t0, arg1, arg2);
+    tcg_gen_shr_i64(t0, arg1, arg2);
     tcg_gen_subfi_i64(t1, 64, arg2);
     tcg_gen_shl_i64(t1, arg1, t1);
     tcg_gen_or_i64(ret, t0, t1);