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-rw-r--r--Makefile.android2
-rwxr-xr-xandroid-configure.sh2
-rw-r--r--android/config/darwin-ppc/config-host.h2
-rw-r--r--block.c4
-rw-r--r--block/raw-posix.c4
-rw-r--r--cpu-exec.c10
-rw-r--r--dyngen-exec.h4
-rw-r--r--fpu/softfloat-native.c15
-rw-r--r--fpu/softfloat-native.h13
-rw-r--r--fpu/softfloat-specialize.h4
-rw-r--r--fpu/softfloat.c138
-rw-r--r--fpu/softfloat.h11
-rw-r--r--gdb-xml/power-core.xml9
-rw-r--r--gdb-xml/power-fpu.xml2
-rw-r--r--gdb-xml/power-spe.xml2
-rw-r--r--gdb-xml/power64-core.xml9
-rw-r--r--kqemu.c2
-rw-r--r--net-android.c4
-rw-r--r--net.c6
-rw-r--r--osdep.c10
-rw-r--r--qemu-char-android.c2
-rw-r--r--qemu-char.c2
-rw-r--r--savevm.c4
-rw-r--r--tcg/i386/tcg-target.h4
-rw-r--r--tcg/sparc/tcg-target.h2
-rw-r--r--vl-android.c4
-rw-r--r--vl.c4
27 files changed, 206 insertions, 69 deletions
diff --git a/Makefile.android b/Makefile.android
index 0773e39..4dbc22a 100644
--- a/Makefile.android
+++ b/Makefile.android
@@ -49,7 +49,7 @@ ifeq ($(HOST_ARCH),ppc)
endif
ifeq ($(HOST_OS),darwin)
- MY_CFLAGS += -mdynamic-no-pic
+ MY_CFLAGS += -mdynamic-no-pic -fno-exceptions
# When building on Leopard or above, we need to use the 10.4 SDK
# or the generated binary will not run on Tiger.
diff --git a/android-configure.sh b/android-configure.sh
index 045e56d..45c8120 100755
--- a/android-configure.sh
+++ b/android-configure.sh
@@ -464,7 +464,7 @@ esac
echo "#define CONFIG_$CONFIG_OS 1" >> $config_h
if [ $BSD = 1 ] ; then
- echo "#define _BSD 1" >> $config_h
+ echo "#define CONFIG_BSD 1" >> $config_h
echo "#define O_LARGEFILE 0" >> $config_h
echo "#define MAP_ANONYMOUS MAP_ANON" >> $config_h
fi
diff --git a/android/config/darwin-ppc/config-host.h b/android/config/darwin-ppc/config-host.h
index cbd43d1..70df3ec 100644
--- a/android/config/darwin-ppc/config-host.h
+++ b/android/config/darwin-ppc/config-host.h
@@ -8,6 +8,6 @@
#define QEMU_VERSION "0.8.2"
#define O_LARGEFILE 0
#define MAP_ANONYMOUS MAP_ANON
-#define _BSD 1
+#define CONFIG_BSD 1
#define CONFIG_SKINS 1
#define CONFIG_UNAME_RELEASE ""
diff --git a/block.c b/block.c
index 844a32b..881bd2d 100644
--- a/block.c
+++ b/block.c
@@ -22,7 +22,7 @@
* THE SOFTWARE.
*/
#include "config-host.h"
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
/* include native header before sys-queue.h */
#include <sys/queue.h>
#endif
@@ -32,7 +32,7 @@
#include "block_int.h"
#include "module.h"
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/types.h>
#include <sys/stat.h>
#include <sys/ioctl.h>
diff --git a/block/raw-posix.c b/block/raw-posix.c
index fa1a394..11effd7 100644
--- a/block/raw-posix.c
+++ b/block/raw-posix.c
@@ -763,7 +763,7 @@ static int64_t raw_getlength(BlockDriverState *bs)
BDRVRawState *s = bs->opaque;
int fd = s->fd;
int64_t size;
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
struct stat sb;
#ifdef __FreeBSD__
int reopened = 0;
@@ -779,7 +779,7 @@ static int64_t raw_getlength(BlockDriverState *bs)
if (ret < 0)
return ret;
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#ifdef __FreeBSD__
again:
#endif
diff --git a/cpu-exec.c b/cpu-exec.c
index 8734337..7bc432d 100644
--- a/cpu-exec.c
+++ b/cpu-exec.c
@@ -39,7 +39,7 @@
#endif
#endif
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
+#if defined(__sparc__) && !defined(CONFIG_SOLARIS)
// Work around ugly bugs in glibc that mangle global register contents
#undef env
#define env cpu_single_env
@@ -259,7 +259,7 @@ int cpu_exec(CPUState *env1)
/* prepare setjmp context for exception handling */
for(;;) {
if (setjmp(env->jmp_env) == 0) {
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
+#if defined(__sparc__) && !defined(CONFIG_SOLARIS)
#undef env
env = cpu_single_env;
#define env cpu_single_env
@@ -404,7 +404,7 @@ int cpu_exec(CPUState *env1)
env->interrupt_request &= ~(CPU_INTERRUPT_HARD | CPU_INTERRUPT_VIRQ);
intno = cpu_get_pic_interrupt(env);
qemu_log_mask(CPU_LOG_TB_IN_ASM, "Servicing hardware INT=0x%02x\n", intno);
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
+#if defined(__sparc__) && !defined(CONFIG_SOLARIS)
#undef env
env = cpu_single_env;
#define env cpu_single_env
@@ -634,7 +634,7 @@ int cpu_exec(CPUState *env1)
while (env->current_tb) {
tc_ptr = tb->tc_ptr;
/* execute the generated code */
-#if defined(__sparc__) && !defined(HOST_SOLARIS)
+#if defined(__sparc__) && !defined(CONFIG_SOLARIS)
#undef env
env = cpu_single_env;
#define env cpu_single_env
@@ -1425,7 +1425,7 @@ int cpu_signal_handler(int host_signum, void *pinfo,
siginfo_t *info = pinfo;
int is_write;
uint32_t insn;
-#if !defined(__arch64__) || defined(HOST_SOLARIS)
+#if !defined(__arch64__) || defined(CONFIG_SOLARIS)
uint32_t *regs = (uint32_t *)(info + 1);
void *sigmask = (regs + 20);
/* XXX: is there a standard glibc define ? */
diff --git a/dyngen-exec.h b/dyngen-exec.h
index c9841df..b649263 100644
--- a/dyngen-exec.h
+++ b/dyngen-exec.h
@@ -40,7 +40,7 @@
/* XXX: This may be wrong for 64-bit ILP32 hosts. */
typedef void * host_reg_t;
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
typedef struct __sFILE FILE;
#else
typedef struct FILE FILE;
@@ -76,7 +76,7 @@ extern int printf(const char *, ...);
#define AREG1 "s0"
#define AREG2 "s1"
#elif defined(__sparc__)
-#ifdef HOST_SOLARIS
+#ifdef CONFIG_SOLARIS
#define AREG0 "g2"
#define AREG1 "g3"
#define AREG2 "g4"
diff --git a/fpu/softfloat-native.c b/fpu/softfloat-native.c
index 2af07a3..8d64f4e 100644
--- a/fpu/softfloat-native.c
+++ b/fpu/softfloat-native.c
@@ -2,15 +2,15 @@
context is supported */
#include "softfloat.h"
#include <math.h>
-#if defined(HOST_SOLARIS)
+#if defined(CONFIG_SOLARIS)
#include <fenv.h>
#endif
void set_float_rounding_mode(int val STATUS_PARAM)
{
STATUS(float_rounding_mode) = val;
-#if defined(HOST_BSD) && !defined(__APPLE__) || \
- (defined(HOST_SOLARIS) && HOST_SOLARIS < 10)
+#if (defined(CONFIG_BSD) && !defined(__APPLE__) && !defined(__GLIBC__)) || \
+ (defined(CONFIG_SOLARIS) && CONFIG_SOLARIS_VERSION < 10)
fpsetround(val);
#elif defined(__arm__)
/* nothing to do */
@@ -26,7 +26,8 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM)
}
#endif
-#if defined(HOST_BSD) || (defined(HOST_SOLARIS) && HOST_SOLARIS < 10)
+#if defined(CONFIG_BSD) || \
+ (defined(CONFIG_SOLARIS) && CONFIG_SOLARIS_VERSION < 10)
#define lrint(d) ((int32_t)rint(d))
#define llrint(d) ((int64_t)rint(d))
#define lrintf(f) ((int32_t)rint(f))
@@ -34,7 +35,8 @@ void set_floatx80_rounding_precision(int val STATUS_PARAM)
#define sqrtf(f) ((float)sqrt(f))
#define remainderf(fa, fb) ((float)remainder(fa, fb))
#define rintf(f) ((float)rint(f))
-#if !defined(__sparc__) && defined(HOST_SOLARIS) && HOST_SOLARIS < 10
+#if !defined(__sparc__) && \
+ (defined(CONFIG_SOLARIS) && CONFIG_SOLARIS_VERSION < 10)
extern long double rintl(long double);
extern long double scalbnl(long double, int);
@@ -349,7 +351,8 @@ uint64_t float64_to_uint64_round_to_zero (float64 a STATUS_PARAM)
/*----------------------------------------------------------------------------
| Software IEC/IEEE double-precision operations.
*----------------------------------------------------------------------------*/
-#if defined(__sun__) && defined(HOST_SOLARIS) && HOST_SOLARIS < 10
+#if defined(__sun__) && \
+ (defined(CONFIG_SOLARIS) && CONFIG_SOLARIS_VERSION < 10)
static inline float64 trunc(float64 x)
{
return x < 0 ? -floor(-x) : floor(x);
diff --git a/fpu/softfloat-native.h b/fpu/softfloat-native.h
index a28c769..fe737b3 100644
--- a/fpu/softfloat-native.h
+++ b/fpu/softfloat-native.h
@@ -1,7 +1,8 @@
/* Native implementation of soft float functions */
#include <math.h>
-#if (defined(HOST_BSD) && !defined(__APPLE__)) || defined(HOST_SOLARIS)
+#if (defined(CONFIG_BSD) && !defined(__APPLE__) && !defined(__GLIBC__)) \
+ || defined(CONFIG_SOLARIS)
#include <ieeefp.h>
#define fabsf(f) ((float)fabs(f))
#else
@@ -19,8 +20,9 @@
* Solaris 10 with GCC4 does not need these macros as they
* are defined in <iso/math_c99.h> with a compiler directive
*/
-#if defined(HOST_SOLARIS) && (( HOST_SOLARIS <= 9 ) || ((HOST_SOLARIS >= 10) \
- && (__GNUC__ < 4))) \
+#if defined(CONFIG_SOLARIS) && \
+ ((CONFIG_SOLARIS_VERSION <= 9 ) || \
+ ((CONFIG_SOLARIS_VERSION == 10) && (__GNUC__ < 4))) \
|| (defined(__OpenBSD__) && (OpenBSD < 200811))
/*
* C99 7.12.3 classification macros
@@ -61,7 +63,7 @@
#define isunordered(x,y) unordered(x, y)
#endif
-#if defined(__sun__) && !defined(NEED_LIBSUNMATH)
+#if defined(__sun__) && !defined(CONFIG_NEEDS_LIBSUNMATH)
#ifndef isnan
# define isnan(x) \
@@ -111,7 +113,8 @@ typedef union {
/*----------------------------------------------------------------------------
| Software IEC/IEEE floating-point rounding mode.
*----------------------------------------------------------------------------*/
-#if (defined(HOST_BSD) && !defined(__APPLE__)) || defined(HOST_SOLARIS)
+#if (defined(CONFIG_BSD) && !defined(__APPLE__) && !defined(__GLIBC__)) \
+ || defined(CONFIG_SOLARIS)
#if defined(__OpenBSD__)
#define FE_RM FP_RM
#define FE_RP FP_RP
diff --git a/fpu/softfloat-specialize.h b/fpu/softfloat-specialize.h
index f607e19..8e6aceb 100644
--- a/fpu/softfloat-specialize.h
+++ b/fpu/softfloat-specialize.h
@@ -61,7 +61,7 @@ typedef struct {
*----------------------------------------------------------------------------*/
#if defined(TARGET_SPARC)
#define float32_default_nan make_float32(0x7FFFFFFF)
-#elif defined(TARGET_POWERPC) || defined(TARGET_ARM)
+#elif defined(TARGET_POWERPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
#define float32_default_nan make_float32(0x7FC00000)
#elif defined(TARGET_HPPA)
#define float32_default_nan make_float32(0x7FA00000)
@@ -189,7 +189,7 @@ static float32 propagateFloat32NaN( float32 a, float32 b STATUS_PARAM)
*----------------------------------------------------------------------------*/
#if defined(TARGET_SPARC)
#define float64_default_nan make_float64(LIT64( 0x7FFFFFFFFFFFFFFF ))
-#elif defined(TARGET_POWERPC) || defined(TARGET_ARM)
+#elif defined(TARGET_POWERPC) || defined(TARGET_ARM) || defined(TARGET_ALPHA)
#define float64_default_nan make_float64(LIT64( 0x7FF8000000000000 ))
#elif defined(TARGET_HPPA)
#define float64_default_nan make_float64(LIT64( 0x7FF4000000000000 ))
diff --git a/fpu/softfloat.c b/fpu/softfloat.c
index 4d58744..395f9b1 100644
--- a/fpu/softfloat.c
+++ b/fpu/softfloat.c
@@ -2457,6 +2457,144 @@ float32 float64_to_float32( float64 a STATUS_PARAM )
}
+
+/*----------------------------------------------------------------------------
+| Packs the sign `zSign', exponent `zExp', and significand `zSig' into a
+| half-precision floating-point value, returning the result. After being
+| shifted into the proper positions, the three fields are simply added
+| together to form the result. This means that any integer portion of `zSig'
+| will be added into the exponent. Since a properly normalized significand
+| will have an integer portion equal to 1, the `zExp' input should be 1 less
+| than the desired result exponent whenever `zSig' is a complete, normalized
+| significand.
+*----------------------------------------------------------------------------*/
+static bits16 packFloat16(flag zSign, int16 zExp, bits16 zSig)
+{
+ return (((bits32)zSign) << 15) + (((bits32)zExp) << 10) + zSig;
+}
+
+/* Half precision floats come in two formats: standard IEEE and "ARM" format.
+ The latter gains extra exponent range by omitting the NaN/Inf encodings. */
+
+float32 float16_to_float32( bits16 a, flag ieee STATUS_PARAM )
+{
+ flag aSign;
+ int16 aExp;
+ bits32 aSig;
+
+ aSign = a >> 15;
+ aExp = (a >> 10) & 0x1f;
+ aSig = a & 0x3ff;
+
+ if (aExp == 0x1f && ieee) {
+ if (aSig) {
+ /* Make sure correct exceptions are raised. */
+ float32ToCommonNaN(a STATUS_VAR);
+ aSig |= 0x200;
+ }
+ return packFloat32(aSign, 0xff, aSig << 13);
+ }
+ if (aExp == 0) {
+ int8 shiftCount;
+
+ if (aSig == 0) {
+ return packFloat32(aSign, 0, 0);
+ }
+
+ shiftCount = countLeadingZeros32( aSig ) - 21;
+ aSig = aSig << shiftCount;
+ aExp = -shiftCount;
+ }
+ return packFloat32( aSign, aExp + 0x70, aSig << 13);
+}
+
+bits16 float32_to_float16( float32 a, flag ieee STATUS_PARAM)
+{
+ flag aSign;
+ int16 aExp;
+ bits32 aSig;
+ bits32 mask;
+ bits32 increment;
+ int8 roundingMode;
+
+ aSig = extractFloat32Frac( a );
+ aExp = extractFloat32Exp( a );
+ aSign = extractFloat32Sign( a );
+ if ( aExp == 0xFF ) {
+ if (aSig) {
+ /* Make sure correct exceptions are raised. */
+ float32ToCommonNaN(a STATUS_VAR);
+ aSig |= 0x00400000;
+ }
+ return packFloat16(aSign, 0x1f, aSig >> 13);
+ }
+ if (aExp == 0 && aSign == 0) {
+ return packFloat16(aSign, 0, 0);
+ }
+ /* Decimal point between bits 22 and 23. */
+ aSig |= 0x00800000;
+ aExp -= 0x7f;
+ if (aExp < -14) {
+ mask = 0x007fffff;
+ if (aExp < -24) {
+ aExp = -25;
+ } else {
+ mask >>= 24 + aExp;
+ }
+ } else {
+ mask = 0x00001fff;
+ }
+ if (aSig & mask) {
+ float_raise( float_flag_underflow STATUS_VAR );
+ roundingMode = STATUS(float_rounding_mode);
+ switch (roundingMode) {
+ case float_round_nearest_even:
+ increment = (mask + 1) >> 1;
+ if ((aSig & mask) == increment) {
+ increment = aSig & (increment << 1);
+ }
+ break;
+ case float_round_up:
+ increment = aSign ? 0 : mask;
+ break;
+ case float_round_down:
+ increment = aSign ? mask : 0;
+ break;
+ default: /* round_to_zero */
+ increment = 0;
+ break;
+ }
+ aSig += increment;
+ if (aSig >= 0x01000000) {
+ aSig >>= 1;
+ aExp++;
+ }
+ } else if (aExp < -14
+ && STATUS(float_detect_tininess) == float_tininess_before_rounding) {
+ float_raise( float_flag_underflow STATUS_VAR);
+ }
+
+ if (ieee) {
+ if (aExp > 15) {
+ float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
+ return packFloat16(aSign, 0x1f, 0);
+ }
+ } else {
+ if (aExp > 16) {
+ float_raise( float_flag_overflow | float_flag_inexact STATUS_VAR);
+ return packFloat16(aSign, 0x1f, 0x3ff);
+ }
+ }
+ if (aExp < -24) {
+ return packFloat16(aSign, 0, 0);
+ }
+ if (aExp < -14) {
+ aSig >>= -14 - aExp;
+ aExp = -14;
+ }
+ return packFloat16(aSign, aExp + 14, aSig >> 13);
+}
+
#ifdef FLOATX80
/*----------------------------------------------------------------------------
diff --git a/fpu/softfloat.h b/fpu/softfloat.h
index 850a01f..c31e62f 100644
--- a/fpu/softfloat.h
+++ b/fpu/softfloat.h
@@ -32,7 +32,7 @@ these four paragraphs for those parts of this code that are retained.
#ifndef SOFTFLOAT_H
#define SOFTFLOAT_H
-#if defined(HOST_SOLARIS) && defined(NEEDS_LIBSUNMATH)
+#if defined(CONFIG_SOLARIS) && defined(CONFIG_NEEDS_LIBSUNMATH)
#include <sunmath.h>
#endif
@@ -90,7 +90,7 @@ typedef int64_t sbits64;
#define FLOAT128
#else
/* native float support */
-#if (defined(__i386__) || defined(__x86_64__)) && !defined(HOST_BSD)
+#if (defined(__i386__) || defined(__x86_64__)) && !defined(CONFIG_BSD)
#define FLOATX80
#endif
#endif /* !CONFIG_SOFTFLOAT */
@@ -187,6 +187,7 @@ typedef struct float_status {
signed char float_detect_tininess;
signed char float_rounding_mode;
signed char float_exception_flags;
+ signed char float_exception_mask;
#ifdef FLOATX80
signed char floatx80_rounding_precision;
#endif
@@ -243,6 +244,12 @@ float128 int64_to_float128( int64_t STATUS_PARAM );
#endif
/*----------------------------------------------------------------------------
+| Software half-precision conversion routines.
+*----------------------------------------------------------------------------*/
+bits16 float32_to_float16( float32, flag STATUS_PARAM );
+float32 float16_to_float32( bits16, flag STATUS_PARAM );
+
+/*----------------------------------------------------------------------------
| Software IEC/IEEE single-precision conversion routines.
*----------------------------------------------------------------------------*/
int float32_to_int32( float32 STATUS_PARAM );
diff --git a/gdb-xml/power-core.xml b/gdb-xml/power-core.xml
index dae13a6..0c69e8c 100644
--- a/gdb-xml/power-core.xml
+++ b/gdb-xml/power-core.xml
@@ -46,13 +46,4 @@
<reg name="lr" bitsize="32" type="code_ptr"/>
<reg name="ctr" bitsize="32" type="uint32"/>
<reg name="xer" bitsize="32" type="uint32"/>
- <!-- HACK: The way the QEMU GDB stub code is currently written requires
- the "integer" registers from the XML file to span the entirety of
- NUM_CORE_REGS that non-XML-aware GDB requires. Otherwise, XML-aware
- GDB thinks that "coprocessor" registers from XML, such as the
- floating-point registers, have register numbers less than
- NUM_CORE_REGS. This can lead to problems. Work around it by using
- an unnamed register as padding; NUM_CORE_REGS on Power is 71 and
- this register is 70. It would be fpscr for non-XML-aware GDB. -->
- <reg name="" bitsize="32" type="uint32"/>
</feature>
diff --git a/gdb-xml/power-fpu.xml b/gdb-xml/power-fpu.xml
index d1ca3a3..3870551 100644
--- a/gdb-xml/power-fpu.xml
+++ b/gdb-xml/power-fpu.xml
@@ -7,7 +7,7 @@
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.fpu">
- <reg name="f0" bitsize="64" type="ieee_double"/>
+ <reg name="f0" bitsize="64" type="ieee_double" regnum="71"/>
<reg name="f1" bitsize="64" type="ieee_double"/>
<reg name="f2" bitsize="64" type="ieee_double"/>
<reg name="f3" bitsize="64" type="ieee_double"/>
diff --git a/gdb-xml/power-spe.xml b/gdb-xml/power-spe.xml
index 1ec15d6..57740cc 100644
--- a/gdb-xml/power-spe.xml
+++ b/gdb-xml/power-spe.xml
@@ -7,7 +7,7 @@
<!DOCTYPE feature SYSTEM "gdb-target.dtd">
<feature name="org.gnu.gdb.power.spe">
- <reg name="ev0h" bitsize="32"/>
+ <reg name="ev0h" bitsize="32" regnum="71"/>
<reg name="ev1h" bitsize="32"/>
<reg name="ev2h" bitsize="32"/>
<reg name="ev3h" bitsize="32"/>
diff --git a/gdb-xml/power64-core.xml b/gdb-xml/power64-core.xml
index fef42e4..6cc1531 100644
--- a/gdb-xml/power64-core.xml
+++ b/gdb-xml/power64-core.xml
@@ -46,13 +46,4 @@
<reg name="lr" bitsize="64" type="code_ptr"/>
<reg name="ctr" bitsize="64" type="uint64"/>
<reg name="xer" bitsize="32" type="uint32"/>
- <!-- HACK: The way the QEMU GDB stub code is currently written requires
- the "integer" registers from the XML file to span the entirety of
- NUM_CORE_REGS that non-XML-aware GDB requires. Otherwise, XML-aware
- GDB thinks that "coprocessor" registers from XML, such as the
- floating-point registers, have register numbers less than
- NUM_CORE_REGS. This can lead to problems. Work around it by using
- an unnamed register as padding; NUM_CORE_REGS on Power is 71 and
- this register is 70. It would be fpscr for non-XML-aware GDB. -->
- <reg name="" bitsize="32" type="uint32"/>
</feature>
diff --git a/kqemu.c b/kqemu.c
index c27c6ae..250df00 100644
--- a/kqemu.c
+++ b/kqemu.c
@@ -26,7 +26,7 @@
#include <sys/mman.h>
#include <sys/ioctl.h>
#endif
-#ifdef HOST_SOLARIS
+#ifdef CONFIG_SOLARIS
#include <sys/ioccom.h>
#endif
#include <stdlib.h>
diff --git a/net-android.c b/net-android.c
index c4d45ce..e656f1e 100644
--- a/net-android.c
+++ b/net-android.c
@@ -54,7 +54,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <libutil.h>
@@ -1223,7 +1223,7 @@ static TAPState *net_tap_fd_init(VLANState *vlan,
return s;
}
-#if defined (HOST_BSD) || defined (__FreeBSD_kernel__)
+#if defined (CONFIG_BSD) || defined (__FreeBSD_kernel__)
static int tap_open(char *ifname, int ifname_size)
{
int fd;
diff --git a/net.c b/net.c
index af9de73..8e6974b 100644
--- a/net.c
+++ b/net.c
@@ -29,7 +29,7 @@
#include <sys/time.h>
#include <zlib.h>
-/* Needed early for HOST_BSD etc. */
+/* Needed early for CONFIG_BSD etc. */
#include "config-host.h"
#ifndef _WIN32
@@ -52,7 +52,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <libutil.h>
@@ -1138,7 +1138,7 @@ static TAPState *net_tap_fd_init(VLANState *vlan,
return s;
}
-#if defined (HOST_BSD) || defined (__FreeBSD_kernel__)
+#if defined (CONFIG_BSD) || defined (__FreeBSD_kernel__)
static int tap_open(char *ifname, int ifname_size)
{
int fd;
diff --git a/osdep.c b/osdep.c
index 5065079..f4aab9b 100644
--- a/osdep.c
+++ b/osdep.c
@@ -28,7 +28,7 @@
#include <errno.h>
#include <unistd.h>
#include <fcntl.h>
-#ifdef HOST_SOLARIS
+#ifdef CONFIG_SOLARIS
#include <sys/types.h>
#include <sys/statvfs.h>
#endif
@@ -39,7 +39,7 @@
#ifdef _WIN32
#define WIN32_LEAN_AND_MEAN
#include <windows.h>
-#elif defined(_BSD)
+#elif defined(CONFIG_BSD)
#include <stdlib.h>
#else
#include <malloc.h>
@@ -95,7 +95,7 @@ static void *kqemu_vmalloc(size_t size)
int map_anon = 0;
const char *tmpdir;
char phys_ram_file[1024];
-#ifdef HOST_SOLARIS
+#ifdef CONFIG_SOLARIS
struct statvfs stfs;
#else
struct statfs stfs;
@@ -104,7 +104,7 @@ static void *kqemu_vmalloc(size_t size)
if (phys_ram_fd < 0) {
tmpdir = getenv("QEMU_TMPDIR");
if (!tmpdir)
-#ifdef HOST_SOLARIS
+#ifdef CONFIG_SOLARIS
tmpdir = "/tmp";
if (statvfs(tmpdir, &stfs) == 0) {
#else
@@ -185,7 +185,7 @@ void *qemu_memalign(size_t alignment, size_t size)
if (ret != 0)
return NULL;
return ptr;
-#elif defined(HOST_BSD)
+#elif defined(CONFIG_BSD)
return valloc(size);
#else
return memalign(alignment, size);
diff --git a/qemu-char-android.c b/qemu-char-android.c
index 671314b..45c81e5 100644
--- a/qemu-char-android.c
+++ b/qemu-char-android.c
@@ -62,7 +62,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#ifdef __FreeBSD__
#include <libutil.h>
diff --git a/qemu-char.c b/qemu-char.c
index 287e0cd..37f50a9 100644
--- a/qemu-char.c
+++ b/qemu-char.c
@@ -61,7 +61,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#ifdef __FreeBSD__
#include <libutil.h>
diff --git a/savevm.c b/savevm.c
index 1157c08..33ec239 100644
--- a/savevm.c
+++ b/savevm.c
@@ -29,7 +29,7 @@
#include <sys/time.h>
#include <zlib.h>
-/* Needed early for HOST_BSD etc. */
+/* Needed early for CONFIG_BSD etc. */
#include "config-host.h"
#ifndef _WIN32
@@ -52,7 +52,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <libutil.h>
diff --git a/tcg/i386/tcg-target.h b/tcg/i386/tcg-target.h
index 301a5bf..69227c3 100644
--- a/tcg/i386/tcg-target.h
+++ b/tcg/i386/tcg-target.h
@@ -52,6 +52,10 @@ enum {
#define TCG_TARGET_HAS_ext8s_i32
#define TCG_TARGET_HAS_ext16s_i32
#define TCG_TARGET_HAS_rot_i32
+#define TCG_TARGET_HAS_ext8u_i32
+#define TCG_TARGET_HAS_ext16u_i32
+
+#define TCG_TARGET_HAS_GUEST_BASE
/* Note: must be synced with dyngen-exec.h */
#define TCG_AREG0 TCG_REG_EBP
diff --git a/tcg/sparc/tcg-target.h b/tcg/sparc/tcg-target.h
index 97f3533..e8f8f65 100644
--- a/tcg/sparc/tcg-target.h
+++ b/tcg/sparc/tcg-target.h
@@ -95,7 +95,7 @@ enum {
/* Note: must be synced with dyngen-exec.h and Makefile.target */
-#ifdef HOST_SOLARIS
+#ifdef CONFIG_SOLARIS
#define TCG_AREG0 TCG_REG_G2
#define TCG_AREG1 TCG_REG_G3
#define TCG_AREG2 TCG_REG_G4
diff --git a/vl-android.c b/vl-android.c
index d6feced..9faf8c3 100644
--- a/vl-android.c
+++ b/vl-android.c
@@ -65,7 +65,7 @@
#include <sys/time.h>
#include <zlib.h>
-/* Needed early for HOST_BSD etc. */
+/* Needed early for CONFIG_BSD etc. */
#include "config-host.h"
#ifndef _WIN32
@@ -90,7 +90,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <libutil.h>
diff --git a/vl.c b/vl.c
index 3242c23..ba6ae5d 100644
--- a/vl.c
+++ b/vl.c
@@ -29,7 +29,7 @@
#include <sys/time.h>
#include <zlib.h>
-/* Needed early for HOST_BSD etc. */
+/* Needed early for CONFIG_BSD etc. */
#include "config-host.h"
#ifndef _WIN32
@@ -54,7 +54,7 @@
#include <dirent.h>
#include <netdb.h>
#include <sys/select.h>
-#ifdef HOST_BSD
+#ifdef CONFIG_BSD
#include <sys/stat.h>
#if defined(__FreeBSD__) || defined(__DragonFly__)
#include <libutil.h>
generated by cgit v1.1 at 2024-05-08 21:51:42 +0000