diff options
Diffstat (limited to 'cpu-defs.h')
| -rw-r--r-- | cpu-defs.h | 85 |
1 files changed, 45 insertions, 40 deletions
@@ -15,28 +15,29 @@ * * You should have received a copy of the GNU Lesser General Public * License along with this library; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston MA 02110-1301 USA */ #ifndef CPU_DEFS_H #define CPU_DEFS_H +#if 0 /* ANDROID */ +#ifndef NEED_CPU_H +#error cpu.h included from common code +#endif +#endif /* ANDROID */ + #include "config.h" #include <setjmp.h> #include <inttypes.h> +#include <signal.h> #include "osdep.h" +#include "sys-queue.h" +#include "targphys.h" #ifndef TARGET_LONG_BITS #error TARGET_LONG_BITS must be defined before including this header #endif -#ifndef TARGET_PHYS_ADDR_BITS -#if TARGET_LONG_BITS >= HOST_LONG_BITS -#define TARGET_PHYS_ADDR_BITS TARGET_LONG_BITS -#else -#define TARGET_PHYS_ADDR_BITS HOST_LONG_BITS -#endif -#endif - #define TARGET_LONG_SIZE (TARGET_LONG_BITS / 8) /* target_ulong is the type of a virtual address */ @@ -56,30 +57,12 @@ typedef uint64_t target_ulong; #error TARGET_LONG_SIZE undefined #endif -/* target_phys_addr_t is the type of a physical address (its size can - be different from 'target_ulong'). We have sizeof(target_phys_addr) - = max(sizeof(unsigned long), - sizeof(size_of_target_physical_address)) because we must pass a - host pointer to memory operations in some cases */ - -#if TARGET_PHYS_ADDR_BITS == 32 -typedef uint32_t target_phys_addr_t; -#define TARGET_FMT_plx "%08x" -#elif TARGET_PHYS_ADDR_BITS == 64 -typedef uint64_t target_phys_addr_t; -#define TARGET_FMT_plx "%016" PRIx64 -#else -#error TARGET_PHYS_ADDR_BITS undefined -#endif - #define HOST_LONG_SIZE (HOST_LONG_BITS / 8) #define EXCP_INTERRUPT 0x10000 /* async interruption */ #define EXCP_HLT 0x10001 /* hlt instruction reached */ #define EXCP_DEBUG 0x10002 /* cpu stopped after a breakpoint or singlestep */ #define EXCP_HALTED 0x10003 /* cpu is halted (waiting for external event) */ -#define MAX_BREAKPOINTS 32 -#define MAX_WATCHPOINTS 32 #define TB_JMP_CACHE_BITS 12 #define TB_JMP_CACHE_SIZE (1 << TB_JMP_CACHE_BITS) @@ -112,7 +95,7 @@ typedef struct CPUTLBEntry { target_ulong addr_write; target_ulong addr_code; /* Addend to virtual address to get physical address. IO accesses - use the correcponding iotlb value. */ + use the corresponding iotlb value. */ #if TARGET_PHYS_ADDR_BITS == 64 /* on i386 Linux make sure it is aligned */ target_phys_addr_t addend __attribute__((aligned(8))); @@ -138,6 +121,22 @@ typedef struct icount_decr_u16 { } icount_decr_u16; #endif +struct kvm_run; +struct KVMState; + +typedef struct CPUBreakpoint { + target_ulong pc; + int flags; /* BP_* */ + TAILQ_ENTRY(CPUBreakpoint) entry; +} CPUBreakpoint; + +typedef struct CPUWatchpoint { + target_ulong vaddr; + target_ulong len_mask; + int flags; /* BP_* */ + TAILQ_ENTRY(CPUWatchpoint) entry; +} CPUWatchpoint; + #define CPU_TEMP_BUF_NLONGS 128 #define CPU_COMMON \ struct TranslationBlock *current_tb; /* currently executing TB */ \ @@ -150,7 +149,10 @@ typedef struct icount_decr_u16 { target_ulong mem_io_vaddr; /* target virtual addr at which the \ memory was accessed */ \ uint32_t halted; /* Nonzero if the CPU is in suspend state */ \ + uint32_t stop; /* Stop request */ \ + uint32_t stopped; /* Artificially stopped */ \ uint32_t interrupt_request; \ + volatile sig_atomic_t exit_request; \ /* The meaning of the MMU modes is defined in the target code. */ \ CPUTLBEntry tlb_table[NB_MMU_MODES][CPU_TLB_SIZE]; \ target_phys_addr_t iotlb[NB_MMU_MODES][CPU_TLB_SIZE]; \ @@ -170,29 +172,32 @@ typedef struct icount_decr_u16 { \ /* from this point: preserved by CPU reset */ \ /* ice debug support */ \ - target_ulong breakpoints[MAX_BREAKPOINTS]; \ - int nb_breakpoints; \ + TAILQ_HEAD(breakpoints_head, CPUBreakpoint) breakpoints; \ int singlestep_enabled; \ \ - struct { \ - target_ulong vaddr; \ - int type; /* PAGE_READ/PAGE_WRITE */ \ - } watchpoint[MAX_WATCHPOINTS]; \ - int nb_watchpoints; \ - int watchpoint_hit; \ + TAILQ_HEAD(watchpoints_head, CPUWatchpoint) watchpoints; \ + CPUWatchpoint *watchpoint_hit; \ + \ + struct GDBRegisterState *gdb_regs; \ \ /* Core interrupt code */ \ jmp_buf jmp_env; \ int exception_index; \ \ - int user_mode_only; \ - \ - void *next_cpu; /* next CPU sharing TB cache */ \ + CPUState *next_cpu; /* next CPU sharing TB cache */ \ int cpu_index; /* CPU index (informative) */ \ + uint32_t host_tid; /* host thread ID */ \ + int numa_node; /* NUMA node this cpu is belonging to */ \ int running; /* Nonzero if cpu is currently running(usermode). */ \ /* user data */ \ void *opaque; \ \ - const char *cpu_model_str; + uint32_t created; \ + struct QemuThread *thread; \ + struct QemuCond *halt_cond; \ + const char *cpu_model_str; \ + struct KVMState *kvm_state; \ + struct kvm_run *kvm_run; \ + int kvm_fd; #endif |