aboutsummaryrefslogtreecommitdiffstats
path: root/hw/goldfish_nand.c
diff options
context:
space:
mode:
Diffstat (limited to 'hw/goldfish_nand.c')
-rw-r--r--hw/goldfish_nand.c24
1 files changed, 24 insertions, 0 deletions
diff --git a/hw/goldfish_nand.c b/hw/goldfish_nand.c
index 6d2182f..8d9b5db 100644
--- a/hw/goldfish_nand.c
+++ b/hw/goldfish_nand.c
@@ -16,6 +16,10 @@
#include "qemu_debug.h"
#include "android/android.h"
+#ifdef TARGET_I386
+#include "kvm.h"
+#endif
+
#define DEBUG 1
#if DEBUG
# define D(...) VERBOSE_PRINT(init,__VA_ARGS__)
@@ -374,6 +378,10 @@ static uint32_t nand_dev_read_file(nand_dev *dev, uint32_t data, uint64_t addr,
if(!eof) {
read_len = do_read(dev->fd, dev->data, read_len);
}
+#ifdef TARGET_I386
+ if (kvm_enabled())
+ cpu_synchronize_state(cpu_single_env, 0);
+#endif
cpu_memory_rw_debug(cpu_single_env, data, dev->data, read_len, 1);
data += read_len;
len -= read_len;
@@ -393,6 +401,10 @@ static uint32_t nand_dev_write_file(nand_dev *dev, uint32_t data, uint64_t addr,
while(len > 0) {
if(len < write_len)
write_len = len;
+#ifdef TARGET_I386
+ if (kvm_enabled())
+ cpu_synchronize_state(cpu_single_env, 0);
+#endif
cpu_memory_rw_debug(cpu_single_env, data, dev->data, write_len, 0);
ret = do_write(dev->fd, dev->data, write_len);
if(ret < write_len) {
@@ -455,6 +467,10 @@ uint32_t nand_dev_do_cmd(nand_dev_controller_state *s, uint32_t cmd)
case NAND_CMD_GET_DEV_NAME:
if(size > dev->devname_len)
size = dev->devname_len;
+#ifdef TARGET_I386
+ if (kvm_enabled())
+ cpu_synchronize_state(cpu_single_env, 0);
+#endif
cpu_memory_rw_debug(cpu_single_env, s->data, (uint8_t*)dev->devname, size, 1);
return size;
case NAND_CMD_READ:
@@ -464,6 +480,10 @@ uint32_t nand_dev_do_cmd(nand_dev_controller_state *s, uint32_t cmd)
size = dev->max_size - addr;
if(dev->fd >= 0)
return nand_dev_read_file(dev, s->data, addr, size);
+#ifdef TARGET_I386
+ if (kvm_enabled())
+ cpu_synchronize_state(cpu_single_env, 0);
+#endif
cpu_memory_rw_debug(cpu_single_env,s->data, &dev->data[addr], size, 1);
return size;
case NAND_CMD_WRITE:
@@ -475,6 +495,10 @@ uint32_t nand_dev_do_cmd(nand_dev_controller_state *s, uint32_t cmd)
size = dev->max_size - addr;
if(dev->fd >= 0)
return nand_dev_write_file(dev, s->data, addr, size);
+#ifdef TARGET_I386
+ if (kvm_enabled())
+ cpu_synchronize_state(cpu_single_env, 0);
+#endif
cpu_memory_rw_debug(cpu_single_env,s->data, &dev->data[addr], size, 0);
return size;
case NAND_CMD_ERASE: