diff options
Diffstat (limited to 'hw')
| -rw-r--r-- | hw/goldfish_events_device.c | 18 | ||||
| -rw-r--r-- | hw/isa.h | 2 | ||||
| -rw-r--r-- | hw/pci_host.h | 5 |
3 files changed, 21 insertions, 4 deletions
diff --git a/hw/goldfish_events_device.c b/hw/goldfish_events_device.c index 549fe4b..afc1724 100644 --- a/hw/goldfish_events_device.c +++ b/hw/goldfish_events_device.c @@ -149,7 +149,23 @@ static unsigned dequeue_event(events_state *s) if(s->first == s->last) { qemu_irq_lower(s->irq); } - +#ifdef TARGET_I386 + /* + * Adding the logic to handle edge-triggered interrupts for x86 + * because the exisiting goldfish events device basically provides + * level-trigger interrupts only. + * + * Logic: When an event (including the type/code/value) is fetched + * by the driver, if there is still another event in the event + * queue, the goldfish event device will re-assert the IRQ so that + * the driver can be notified to fetch the event again. + */ + else if (((s->first + 2) & (MAX_EVENTS - 1)) < s->last || + (s->first & (MAX_EVENTS - 1)) > s->last) { /* if there still is an event */ + qemu_irq_lower(s->irq); + qemu_irq_raise(s->irq); + } +#endif return n; } @@ -6,6 +6,8 @@ #include "ioport.h" #include "qdev.h" +extern target_phys_addr_t isa_mem_base; + void isa_mmio_init(target_phys_addr_t base, target_phys_addr_t size); /* dma.c */ diff --git a/hw/pci_host.h b/hw/pci_host.h index 757b0e2..0465e02 100644 --- a/hw/pci_host.h +++ b/hw/pci_host.h @@ -34,11 +34,10 @@ do { printf("pci_host_data: " fmt , ## __VA_ARGS__); } while (0) #else #define PCI_DPRINTF(fmt, ...) #endif - -typedef struct { +struct PCIHostState { uint32_t config_reg; PCIBus *bus; -} PCIHostState; +}; static void pci_host_data_writeb(void* opaque, pci_addr_t addr, uint32_t val) { |