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authorMans Rullgard <mans@mansr.com>2011-04-05 17:43:01 +0300
committerMartin Storsjo <martin@martin.st>2012-01-13 21:16:13 +0200
commit813eebeb773b1e4c42c2063a7fe37a94514e596a (patch)
tree09904dcff7e5010ae7bd19834219df3d24af7ec5 /media/libstagefright/codecs/aacenc/basic_op
parent9da751147af3222258093d9f41cabf0ea1391c04 (diff)
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stagefright aacenc: Use ARMv6 SSAT instruction
Change-Id: I652eaaa54e7766d9dca80fd8cc156ca481359471
Diffstat (limited to 'media/libstagefright/codecs/aacenc/basic_op')
-rw-r--r--media/libstagefright/codecs/aacenc/basic_op/basic_op.h34
-rw-r--r--media/libstagefright/codecs/aacenc/basic_op/typedefs.h7
2 files changed, 39 insertions, 2 deletions
diff --git a/media/libstagefright/codecs/aacenc/basic_op/basic_op.h b/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
index e878bba..7c45132 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
@@ -264,6 +264,18 @@ __inline Word32 ASM_shr(Word32 L_var1, Word16 var2)
__inline Word32 ASM_shl(Word32 L_var1, Word16 var2)
{
+#if ARMV6_SAT
+ Word32 result;
+ asm (
+ "CMP %[var2], #16\n"
+ "MOVLT %[result], %[L_var1], ASL %[var2]\n"
+ "MOVGE %[result], %[L_var1], ASL #16\n"
+ "SSAT %[result], #16, %[result]\n"
+ :[result]"=r"(result)
+ :[L_var1]"r"(L_var1), [var2]"r"(var2)
+ );
+ return result;
+#else
Word32 result;
Word32 tmp;
asm (
@@ -277,6 +289,7 @@ __inline Word32 ASM_shl(Word32 L_var1, Word16 var2)
:[L_var1]"r"(L_var1), [var2]"r"(var2), [mask]"r"(0x7fff)
);
return result;
+#endif
}
#endif
@@ -288,7 +301,15 @@ __inline Word32 ASM_shl(Word32 L_var1, Word16 var2)
#if (SATRUATE_IS_INLINE)
__inline Word16 saturate(Word32 L_var1)
{
-#if ARMV5TE_SAT
+#if ARMV6_SAT
+ Word16 result;
+ asm (
+ "SSAT %[result], #16, %[L_var1]"
+ : [result]"=r"(result)
+ : [L_var1]"r"(L_var1)
+ );
+ return result;
+#elif ARMV5TE_SAT
Word16 result;
Word32 tmp;
asm volatile (
@@ -671,7 +692,16 @@ __inline Word16 div_s (Word16 var1, Word16 var2)
#if (MULT_IS_INLINE)
__inline Word16 mult (Word16 var1, Word16 var2)
{
-#if ARMV5TE_MULT
+#if ARMV5TE_MULT && ARMV6_SAT
+ Word32 result;
+ asm (
+ "SMULBB %[result], %[var1], %[var2] \n"
+ "SSAT %[result], #16, %[result], ASR #15 \n"
+ :[result]"=r"(result)
+ :[var1]"r"(var1), [var2]"r"(var2)
+ );
+ return result;
+#elif ARMV5TE_MULT
Word32 result, tmp;
asm (
"SMULBB %[tmp], %[var1], %[var2] \n"
diff --git a/media/libstagefright/codecs/aacenc/basic_op/typedefs.h b/media/libstagefright/codecs/aacenc/basic_op/typedefs.h
index c924e2c..eb0d237 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/typedefs.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/typedefs.h
@@ -130,6 +130,13 @@ typedef unsigned __int64 UWord64;
#define ARMV5TE_NORM_L 1
#define ARMV5TE_L_MPY_LS 1
#endif
+#if ARMV6_INASM
+ #undef ARMV5TE_ADD
+ #define ARMV5TE_ADD 0
+ #undef ARMV5TE_SUB
+ #define ARMV5TE_SUB 0
+ #define ARMV6_SAT 1
+#endif
//basic operation functions optimization flags
#define SATRUATE_IS_INLINE 1 //define saturate as inline function