stagefright aacenc/amrwbenc: Remove trailing whitespace

This was applied in AOSP master earlier, in commit
b21611e5b0f1797e39e781d91ade023bac87637f, but when merged
into the Google internal tree in
88c2d4d26d79384f32a25bd775cf873cb678b12a, none of these
changes have been brought in. (The diff of this merge commit
and its first parent, d94b71d, is empty.)

Therefore, reapply the rest of these changes on the files
that still are present in the current version.

Change-Id: I645a9b9134769958a11808a06163123d28d83e46

6 files changed, 203 insertions, 203 deletions

diff --git a/media/libstagefright/codecs/aacenc/basic_op/basic_op.h b/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
index 8291684..ef3c31b 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/basic_op.h
@@ -91,7 +91,7 @@ __inline Word32 L_msu (Word32 L_var3, Word16 var1, Word16 var2);
 #else
 Word32 L_msu (Word32 L_var3, Word16 var1, Word16 var2);
 #endif
-    
+
 /* Long sub,        2 */
 #if (L_SUB_IS_INLINE)
 __inline Word32 L_sub(Word32 L_var1, Word32 L_var2);
@@ -119,7 +119,7 @@ __inline Word16 add (Word16 var1, Word16 var2);
 #else
 Word16 add (Word16 var1, Word16 var2);
 #endif
-    
+
 /* Short sub,           1   */
 #if (SUB_IS_INLINE)
 __inline Word16 sub(Word16 var1, Word16 var2);
@@ -227,48 +227,48 @@ Word32 L_shr_r (Word32 L_var1, Word16 var2);
 #if ARMV4_INASM
 __inline Word32 ASM_L_shr(Word32 L_var1, Word16 var2)
 {
-	Word32 result; 
-	asm volatile( 
-		"MOV %[result], %[L_var1], ASR %[var2] \n" 
+	Word32 result;
+	asm volatile(
+		"MOV %[result], %[L_var1], ASR %[var2] \n"
 		:[result]"=r"(result)
 		:[L_var1]"r"(L_var1), [var2]"r"(var2)
-		); 
-	return result;	
+		);
+	return result;
 }
- 
+
 __inline Word32 ASM_L_shl(Word32 L_var1, Word16 var2)
 {
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"MOV	r2, %[L_var1] \n"
 		"MOV	r3, #0x7fffffff\n"
-		"MOV	%[result], %[L_var1], ASL %[var2] \n" 
+		"MOV	%[result], %[L_var1], ASL %[var2] \n"
 		"TEQ	r2, %[result], ASR %[var2]\n"
 		"EORNE  %[result],r3,r2,ASR#31\n"
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1), [var2]"r"(var2)
 		:"r2", "r3"
-		); 
-	return result;	
+		);
+	return result;
 }
 
 __inline Word32 ASM_shr(Word32 L_var1, Word16 var2)
 {
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"CMP	%[var2], #15\n"
 		"MOVGE  %[var2], #15\n"
 		"MOV	%[result], %[L_var1], ASR %[var2]\n"
 		:[result]"=r"(result)
-		:[L_var1]"r"(L_var1), [var2]"r"(var2) 
-		); 
-	return result;	
-} 
+		:[L_var1]"r"(L_var1), [var2]"r"(var2)
+		);
+	return result;
+}
 
 __inline Word32 ASM_shl(Word32 L_var1, Word16 var2)
 {
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"CMP	%[var2], #16\n"
 		"MOVGE  %[var2], #16\n"
 		"MOV    %[result], %[L_var1], ASL %[var2]\n"
@@ -280,9 +280,9 @@ __inline Word32 ASM_shl(Word32 L_var1, Word16 var2)
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1), [var2]"r"(var2)
 		:"r2", "r3"
-		); 
-	return result;	
-} 
+		);
+	return result;
+}
 #endif
 
 /*___________________________________________________________________________
@@ -300,17 +300,17 @@ __inline Word16 saturate(Word32 L_var1)
 		"MOV	r3, #1\n"
 		"MOV	r2,%[L_var1],ASR#15\n"
 		"RSB	r3, r3, r3, LSL #15\n"
-		"TEQ	r2,%[L_var1],ASR#31\n"	
+		"TEQ	r2,%[L_var1],ASR#31\n"
 		"EORNE	%[result],r3,%[L_var1],ASR#31\n"
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1)
-		:"r2", "r3"			
+		:"r2", "r3"
 	);
 
 	return result;
 #else
     Word16 var_out;
-    
+
     //var_out = (L_var1 > (Word32)0X00007fffL) ? (MAX_16) : ((L_var1 < (Word32)0xffff8000L) ? (MIN_16) : ((Word16)L_var1));
 
     if (L_var1 > 0X00007fffL)
@@ -419,13 +419,13 @@ __inline Word16 shr (Word16 var1, Word16 var2)
 __inline Word32 L_mult(Word16 var1, Word16 var2)
 {
 #if ARMV5TE_L_MULT
-	Word32 result; 
-	asm volatile( 
-		"SMULBB %[result], %[var1], %[var2] \n" 
-		"QADD %[result], %[result], %[result] \n" 
+	Word32 result;
+	asm volatile(
+		"SMULBB %[result], %[var1], %[var2] \n"
+		"QADD %[result], %[result], %[result] \n"
 		:[result]"+r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
-		); 
+		);
 	return result;
 #else
     Word32 L_var_out;
@@ -449,14 +449,14 @@ __inline Word32 L_mult(Word16 var1, Word16 var2)
 __inline Word32 L_msu (Word32 L_var3, Word16 var1, Word16 var2)
 {
 #if ARMV5TE_L_MSU
-	Word32 result; 
-	asm volatile( 
-		"SMULBB %[result], %[var1], %[var2] \n" 
+	Word32 result;
+	asm volatile(
+		"SMULBB %[result], %[var1], %[var2] \n"
 		"QADD %[result], %[result], %[result] \n"
 		"QSUB %[result], %[L_var3], %[result]\n"
 		:[result]"+r"(result)
 		:[L_var3]"r"(L_var3), [var1]"r"(var1), [var2]"r"(var2)
-		); 
+		);
 	return result;
 #else
     Word32 L_var_out;
@@ -473,12 +473,12 @@ __inline Word32 L_msu (Word32 L_var3, Word16 var1, Word16 var2)
 __inline Word32 L_sub(Word32 L_var1, Word32 L_var2)
 {
 #if ARMV5TE_L_SUB
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"QSUB %[result], %[L_var1], %[L_var2]\n"
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1), [L_var2]"r"(L_var2)
-		); 
+		);
 	return result;
 #else
     Word32 L_var_out;
@@ -588,9 +588,9 @@ __inline Word32 L_shr (Word32 L_var1, Word16 var2)
 __inline Word16 add (Word16 var1, Word16 var2)
 {
 #if ARMV5TE_ADD
-	Word32 result; 
-	asm volatile( 
-		"ADD  %[result], %[var1], %[var2] \n" 
+	Word32 result;
+	asm volatile(
+		"ADD  %[result], %[var1], %[var2] \n"
 		"MOV  r3, #0x1\n"
 		"MOV  r2, %[result], ASR #15\n"
 		"RSB  r3, r3, r3, LSL, #15\n"
@@ -599,7 +599,7 @@ __inline Word16 add (Word16 var1, Word16 var2)
 		:[result]"+r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		:"r2", "r3"
-		); 
+		);
 	return result;
 #else
     Word16 var_out;
@@ -618,18 +618,18 @@ __inline Word16 add (Word16 var1, Word16 var2)
 __inline Word16 sub(Word16 var1, Word16 var2)
 {
 #if ARMV5TE_SUB
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"MOV   r3, #1\n"
-		"SUB   %[result], %[var1], %[var2] \n"		
+		"SUB   %[result], %[var1], %[var2] \n"
 		"RSB   r3,r3,r3,LSL#15\n"
-		"MOV   r2, %[var1], ASR #15 \n" 
+		"MOV   r2, %[var1], ASR #15 \n"
 		"TEQ   r2, %[var1], ASR #31 \n"
 		"EORNE %[result], r3, %[result], ASR #31 \n"
 		:[result]"+r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		:"r2", "r3"
-		); 
+		);
 	return result;
 #else
     Word16 var_out;
@@ -637,7 +637,7 @@ __inline Word16 sub(Word16 var1, Word16 var2)
 
     L_diff = (Word32) var1 - var2;
     var_out = saturate(L_diff);
-   
+
     return (var_out);
 #endif
 }
@@ -657,16 +657,16 @@ __inline Word16 div_s (Word16 var1, Word16 var2)
     {
     	var_out = 0;
     	L_num = (Word32) var1;
-    
+
     	L_denom = (Word32) var2;
-    	
+
 		//return (L_num<<15)/var2;
 
     	for (iteration = 0; iteration < 15; iteration++)
     	{
     		var_out <<= 1;
     		L_num <<= 1;
-    		
+
     		if (L_num >= L_denom)
     		{
     			L_num -= L_denom;
@@ -683,8 +683,8 @@ __inline Word16 div_s (Word16 var1, Word16 var2)
 __inline Word16 mult (Word16 var1, Word16 var2)
 {
 #if ARMV5TE_MULT
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"SMULBB r2, %[var1], %[var2] \n"
 		"MOV	r3, #1\n"
 		"MOV	%[result], r2, ASR #15\n"
@@ -695,7 +695,7 @@ __inline Word16 mult (Word16 var1, Word16 var2)
 		:[result]"+r"(result)
 		:[var1]"r"(var1), [var2]"r"(var2)
 		:"r2", "r3"
-		); 
+		);
 	return result;
 #else
     Word16 var_out;
@@ -718,8 +718,8 @@ __inline Word16 mult (Word16 var1, Word16 var2)
 __inline Word16 norm_s (Word16 var1)
 {
 #if ARMV5TE_NORM_S
-	Word16 result; 
-	asm volatile( 
+	Word16 result;
+	asm volatile(
 		"MOV   r2,%[var1] \n"
 		"CMP   r2, #0\n"
 		"RSBLT %[var1], %[var1], #0 \n"
@@ -727,11 +727,11 @@ __inline Word16 norm_s (Word16 var1)
 		"SUBNE %[result], %[result], #17\n"
 		"MOVEQ %[result], #0\n"
 		"CMP   r2, #-1\n"
-		"MOVEQ %[result], #15\n" 
+		"MOVEQ %[result], #15\n"
 		:[result]"+r"(result)
 		:[var1]"r"(var1)
 		:"r2"
-		); 
+		);
 	return result;
 #else
     Word16 var_out;
@@ -768,15 +768,15 @@ __inline Word16 norm_s (Word16 var1)
 __inline Word16 norm_l (Word32 L_var1)
 {
 #if ARMV5TE_NORM_L
-	Word16 result; 
-	asm volatile( 
+	Word16 result;
+	asm volatile(
 		"CMP    %[L_var1], #0\n"
 		"CLZNE  %[result], %[L_var1]\n"
-		"SUBNE  %[result], %[result], #1\n" 
+		"SUBNE  %[result], %[result], #1\n"
 		"MOVEQ  %[result], #0\n"
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1)
-		); 
+		);
 	return result;
 #else
     //Word16 var_out;
@@ -805,84 +805,84 @@ __inline Word16 norm_l (Word32 L_var1)
     //}
     //return (var_out);
   Word16 a16;
-  Word16 r = 0 ;       
+  Word16 r = 0 ;
+
 
-   
   if ( L_var1 < 0 ) {
-    L_var1 = ~L_var1; 
+    L_var1 = ~L_var1;
   }
 
   if (0 == (L_var1 & 0x7fff8000)) {
     a16 = extract_l(L_var1);
     r += 16;
-       
+
     if (0 == (a16 & 0x7f80)) {
       r += 8;
-         
+
       if (0 == (a16 & 0x0078)) {
         r += 4;
-           
+
         if (0 == (a16 & 0x0006)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x0001)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x0004)) {
             r += 1;
           }
         }
       }
       else {
-           
+
         if (0 == (a16 & 0x0060)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x0010)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x0040)) {
             r += 1;
           }
         }
       }
-    } 
-    else { 
-         
+    }
+    else {
+
       if (0 == (a16 & 0x7800)) {
         r += 4;
-           
+
         if (0 == (a16 & 0x0600)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x0100)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x0400)) {
             r += 1;
           }
         }
       }
       else {
-           
+
         if (0 == (a16 & 0x6000)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x1000)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x4000)) {
             r += 1;
           }
@@ -892,38 +892,38 @@ __inline Word16 norm_l (Word32 L_var1)
   }
   else {
     a16 = extract_h(L_var1);
-       
+
     if (0 == (a16 & 0x7f80)) {
       r += 8;
-         
+
       if (0 == (a16 & 0x0078)) {
         r += 4 ;
-           
+
         if (0 == (a16 & 0x0006)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x0001)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x0004)) {
             r += 1;
           }
         }
       }
       else {
-           
+
         if (0 == (a16 & 0x0060)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x0010)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x0040)) {
             r += 1;
           }
@@ -931,35 +931,35 @@ __inline Word16 norm_l (Word32 L_var1)
       }
     }
     else {
-         
+
       if (0 == (a16 & 0x7800)) {
         r += 4;
-           
+
         if (0 == (a16 & 0x0600)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x0100)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x0400)) {
             r += 1;
           }
         }
       }
       else {
-           
+
         if (0 == (a16 & 0x6000)) {
           r += 2;
-             
+
           if (0 == (a16 & 0x1000)) {
             r += 1;
           }
         }
         else {
-             
+
           if (0 == (a16 & 0x4000)) {
             return 1;
           }
@@ -967,7 +967,7 @@ __inline Word16 norm_l (Word32 L_var1)
       }
     }
   }
-  
+
   return r ;
 #endif
 }
@@ -978,17 +978,17 @@ __inline Word16 norm_l (Word32 L_var1)
 __inline Word16 round16(Word32 L_var1)
 {
 #if ARMV5TE_ROUND
-	Word16 result; 
-	asm volatile( 
+	Word16 result;
+	asm volatile(
 		"MOV   r1,#0x00008000\n"
 		"QADD  %[result], %[L_var1], r1\n"
-		"MOV   %[result], %[result], ASR #16 \n" 
+		"MOV   %[result], %[result], ASR #16 \n"
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1)
 		:"r1"
-		); 
+		);
 	return result;
-#else   
+#else
     Word16 var_out;
     Word32 L_rounded;
 
@@ -1004,14 +1004,14 @@ __inline Word16 round16(Word32 L_var1)
 __inline Word32 L_mac (Word32 L_var3, Word16 var1, Word16 var2)
 {
 #if ARMV5TE_L_MAC
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"SMULBB %[result], %[var1], %[var2]\n"
 		"QADD	%[result], %[result], %[result]\n"
 		"QADD   %[result], %[result], %[L_var3]\n"
 		:[result]"+r"(result)
 		: [L_var3]"r"(L_var3), [var1]"r"(var1), [var2]"r"(var2)
-		); 
+		);
 	return result;
 #else
     Word32 L_var_out;
@@ -1028,12 +1028,12 @@ __inline Word32 L_mac (Word32 L_var3, Word16 var1, Word16 var2)
 __inline Word32 L_add (Word32 L_var1, Word32 L_var2)
 {
 #if ARMV5TE_L_ADD
-	Word32 result; 
-	asm volatile( 
+	Word32 result;
+	asm volatile(
 		"QADD %[result], %[L_var1], %[L_var2]\n"
 		:[result]"+r"(result)
 		:[L_var1]"r"(L_var1), [L_var2]"r"(L_var2)
-		); 
+		);
 	return result;
 #else
     Word32 L_var_out;
@@ -1114,7 +1114,7 @@ __inline Word16 msu_r (Word32 L_var3, Word16 var1, Word16 var2)
 
     L_var3 = L_msu (L_var3, var1, var2);
     var_out = (Word16)((L_var3 + 0x8000L) >> 16);
-    
+
     return (var_out);
 }
 #endif
diff --git a/media/libstagefright/codecs/aacenc/basic_op/basicop2.c b/media/libstagefright/codecs/aacenc/basic_op/basicop2.c
index 82d3f38..d43bbd9 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/basicop2.c
+++ b/media/libstagefright/codecs/aacenc/basic_op/basicop2.c
@@ -16,7 +16,7 @@
 /*******************************************************************************
 	File:		basicop2.c
 
-	Content:	Basic arithmetic operators. 
+	Content:	Basic arithmetic operators.
 
 *******************************************************************************/
 
@@ -462,7 +462,7 @@ Word32 L_mult(Word16 var1, Word16 var2)
     {
         L_var_out = MAX_32;
     }
-        
+
     return (L_var_out);
 }
 #endif
diff --git a/media/libstagefright/codecs/aacenc/basic_op/oper_32b.c b/media/libstagefright/codecs/aacenc/basic_op/oper_32b.c
index 0ad82f0..e48af9d 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/oper_32b.c
+++ b/media/libstagefright/codecs/aacenc/basic_op/oper_32b.c
@@ -17,7 +17,7 @@
 	File:		oper_32b.c
 
 	Content:	  This file contains operations in double precision.
- 
+
 *******************************************************************************/
 
 #include "typedef.h"
@@ -200,12 +200,12 @@ Word32 Div_32 (Word32 L_num, Word32 denom)
 }
 
 /*!
- 
-  \brief  calculates the log dualis times 4 of argument 
+
+  \brief  calculates the log dualis times 4 of argument
           iLog4(x) = (Word32)(4 * log(value)/log(2.0))
 
   \return ilog4 value
- 
+
 */
 Word16 iLog4(Word32 value)
 {
@@ -225,7 +225,7 @@ Word16 iLog4(Word32 value)
     iLog4 = (-(iLog4 << 2) - norm_s(tmp16)) - 1;
   }
   else {
-    iLog4 = -128; /* -(INT_BITS*4); */                                          
+    iLog4 = -128; /* -(INT_BITS*4); */
   }
 
   return iLog4;
@@ -268,79 +268,79 @@ Word32 rsqrt(Word32 value,     /*!< Operand to square root (0.0 ... 1) */
 }
 
 static const Word32 pow2Table[POW2_TABLE_SIZE] = {
-0x7fffffff, 0x7fa765ad, 0x7f4f08ae, 0x7ef6e8da, 
-0x7e9f0606, 0x7e476009, 0x7deff6b6, 0x7d98c9e6, 
-0x7d41d96e, 0x7ceb2523, 0x7c94acde, 0x7c3e7073, 
-0x7be86fb9, 0x7b92aa88, 0x7b3d20b6, 0x7ae7d21a, 
-0x7a92be8b, 0x7a3de5df, 0x79e947ef, 0x7994e492, 
-0x7940bb9e, 0x78ecccec, 0x78991854, 0x78459dac, 
-0x77f25cce, 0x779f5591, 0x774c87cc, 0x76f9f359, 
-0x76a7980f, 0x765575c8, 0x76038c5b, 0x75b1dba2, 
-0x75606374, 0x750f23ab, 0x74be1c20, 0x746d4cac, 
-0x741cb528, 0x73cc556d, 0x737c2d55, 0x732c3cba, 
-0x72dc8374, 0x728d015d, 0x723db650, 0x71eea226, 
-0x719fc4b9, 0x71511de4, 0x7102ad80, 0x70b47368, 
-0x70666f76, 0x7018a185, 0x6fcb096f, 0x6f7da710, 
-0x6f307a41, 0x6ee382de, 0x6e96c0c3, 0x6e4a33c9, 
-0x6dfddbcc, 0x6db1b8a8, 0x6d65ca38, 0x6d1a1057, 
-0x6cce8ae1, 0x6c8339b2, 0x6c381ca6, 0x6bed3398, 
-0x6ba27e66, 0x6b57fce9, 0x6b0daeff, 0x6ac39485, 
-0x6a79ad56, 0x6a2ff94f, 0x69e6784d, 0x699d2a2c, 
-0x69540ec9, 0x690b2601, 0x68c26fb1, 0x6879ebb6, 
-0x683199ed, 0x67e97a34, 0x67a18c68, 0x6759d065, 
-0x6712460b, 0x66caed35, 0x6683c5c3, 0x663ccf92, 
-0x65f60a80, 0x65af766a, 0x6569132f, 0x6522e0ad, 
-0x64dcdec3, 0x64970d4f, 0x64516c2e, 0x640bfb41, 
-0x63c6ba64, 0x6381a978, 0x633cc85b, 0x62f816eb, 
-0x62b39509, 0x626f4292, 0x622b1f66, 0x61e72b65, 
-0x61a3666d, 0x615fd05f, 0x611c6919, 0x60d9307b, 
-0x60962665, 0x60534ab7, 0x60109d51, 0x5fce1e12, 
-0x5f8bccdb, 0x5f49a98c, 0x5f07b405, 0x5ec5ec26, 
-0x5e8451d0, 0x5e42e4e3, 0x5e01a540, 0x5dc092c7, 
-0x5d7fad59, 0x5d3ef4d7, 0x5cfe6923, 0x5cbe0a1c, 
-0x5c7dd7a4, 0x5c3dd19c, 0x5bfdf7e5, 0x5bbe4a61, 
-0x5b7ec8f2, 0x5b3f7377, 0x5b0049d4, 0x5ac14bea, 
-0x5a82799a, 0x5a43d2c6, 0x5a055751, 0x59c7071c, 
-0x5988e209, 0x594ae7fb, 0x590d18d3, 0x58cf7474, 
-0x5891fac1, 0x5854ab9b, 0x581786e6, 0x57da8c83, 
-0x579dbc57, 0x57611642, 0x57249a29, 0x56e847ef, 
-0x56ac1f75, 0x567020a0, 0x56344b52, 0x55f89f70, 
-0x55bd1cdb, 0x5581c378, 0x55469329, 0x550b8bd4, 
-0x54d0ad5b, 0x5495f7a1, 0x545b6a8b, 0x542105fd, 
-0x53e6c9db, 0x53acb607, 0x5372ca68, 0x533906e0, 
-0x52ff6b55, 0x52c5f7aa, 0x528cabc3, 0x52538786, 
-0x521a8ad7, 0x51e1b59a, 0x51a907b4, 0x5170810b, 
-0x51382182, 0x50ffe8fe, 0x50c7d765, 0x508fec9c, 
-0x50582888, 0x50208b0e, 0x4fe91413, 0x4fb1c37c, 
-0x4f7a9930, 0x4f439514, 0x4f0cb70c, 0x4ed5ff00, 
-0x4e9f6cd4, 0x4e69006e, 0x4e32b9b4, 0x4dfc988c, 
-0x4dc69cdd, 0x4d90c68b, 0x4d5b157e, 0x4d25899c, 
-0x4cf022ca, 0x4cbae0ef, 0x4c85c3f1, 0x4c50cbb8, 
-0x4c1bf829, 0x4be7492b, 0x4bb2bea5, 0x4b7e587d, 
-0x4b4a169c, 0x4b15f8e6, 0x4ae1ff43, 0x4aae299b, 
-0x4a7a77d5, 0x4a46e9d6, 0x4a137f88, 0x49e038d0, 
-0x49ad1598, 0x497a15c4, 0x4947393f, 0x49147fee, 
-0x48e1e9ba, 0x48af768a, 0x487d2646, 0x484af8d6, 
-0x4818ee22, 0x47e70611, 0x47b5408c, 0x47839d7b, 
-0x47521cc6, 0x4720be55, 0x46ef8210, 0x46be67e0, 
-0x468d6fae, 0x465c9961, 0x462be4e2, 0x45fb521a, 
-0x45cae0f2, 0x459a9152, 0x456a6323, 0x453a564d, 
-0x450a6abb, 0x44daa054, 0x44aaf702, 0x447b6ead, 
-0x444c0740, 0x441cc0a3, 0x43ed9ac0, 0x43be9580, 
-0x438fb0cb, 0x4360ec8d, 0x433248ae, 0x4303c517, 
-0x42d561b4, 0x42a71e6c, 0x4278fb2b, 0x424af7da, 
-0x421d1462, 0x41ef50ae, 0x41c1aca8, 0x41942839, 
-0x4166c34c, 0x41397dcc, 0x410c57a2, 0x40df50b8, 
-0x40b268fa, 0x4085a051, 0x4058f6a8, 0x402c6be9 
+0x7fffffff, 0x7fa765ad, 0x7f4f08ae, 0x7ef6e8da,
+0x7e9f0606, 0x7e476009, 0x7deff6b6, 0x7d98c9e6,
+0x7d41d96e, 0x7ceb2523, 0x7c94acde, 0x7c3e7073,
+0x7be86fb9, 0x7b92aa88, 0x7b3d20b6, 0x7ae7d21a,
+0x7a92be8b, 0x7a3de5df, 0x79e947ef, 0x7994e492,
+0x7940bb9e, 0x78ecccec, 0x78991854, 0x78459dac,
+0x77f25cce, 0x779f5591, 0x774c87cc, 0x76f9f359,
+0x76a7980f, 0x765575c8, 0x76038c5b, 0x75b1dba2,
+0x75606374, 0x750f23ab, 0x74be1c20, 0x746d4cac,
+0x741cb528, 0x73cc556d, 0x737c2d55, 0x732c3cba,
+0x72dc8374, 0x728d015d, 0x723db650, 0x71eea226,
+0x719fc4b9, 0x71511de4, 0x7102ad80, 0x70b47368,
+0x70666f76, 0x7018a185, 0x6fcb096f, 0x6f7da710,
+0x6f307a41, 0x6ee382de, 0x6e96c0c3, 0x6e4a33c9,
+0x6dfddbcc, 0x6db1b8a8, 0x6d65ca38, 0x6d1a1057,
+0x6cce8ae1, 0x6c8339b2, 0x6c381ca6, 0x6bed3398,
+0x6ba27e66, 0x6b57fce9, 0x6b0daeff, 0x6ac39485,
+0x6a79ad56, 0x6a2ff94f, 0x69e6784d, 0x699d2a2c,
+0x69540ec9, 0x690b2601, 0x68c26fb1, 0x6879ebb6,
+0x683199ed, 0x67e97a34, 0x67a18c68, 0x6759d065,
+0x6712460b, 0x66caed35, 0x6683c5c3, 0x663ccf92,
+0x65f60a80, 0x65af766a, 0x6569132f, 0x6522e0ad,
+0x64dcdec3, 0x64970d4f, 0x64516c2e, 0x640bfb41,
+0x63c6ba64, 0x6381a978, 0x633cc85b, 0x62f816eb,
+0x62b39509, 0x626f4292, 0x622b1f66, 0x61e72b65,
+0x61a3666d, 0x615fd05f, 0x611c6919, 0x60d9307b,
+0x60962665, 0x60534ab7, 0x60109d51, 0x5fce1e12,
+0x5f8bccdb, 0x5f49a98c, 0x5f07b405, 0x5ec5ec26,
+0x5e8451d0, 0x5e42e4e3, 0x5e01a540, 0x5dc092c7,
+0x5d7fad59, 0x5d3ef4d7, 0x5cfe6923, 0x5cbe0a1c,
+0x5c7dd7a4, 0x5c3dd19c, 0x5bfdf7e5, 0x5bbe4a61,
+0x5b7ec8f2, 0x5b3f7377, 0x5b0049d4, 0x5ac14bea,
+0x5a82799a, 0x5a43d2c6, 0x5a055751, 0x59c7071c,
+0x5988e209, 0x594ae7fb, 0x590d18d3, 0x58cf7474,
+0x5891fac1, 0x5854ab9b, 0x581786e6, 0x57da8c83,
+0x579dbc57, 0x57611642, 0x57249a29, 0x56e847ef,
+0x56ac1f75, 0x567020a0, 0x56344b52, 0x55f89f70,
+0x55bd1cdb, 0x5581c378, 0x55469329, 0x550b8bd4,
+0x54d0ad5b, 0x5495f7a1, 0x545b6a8b, 0x542105fd,
+0x53e6c9db, 0x53acb607, 0x5372ca68, 0x533906e0,
+0x52ff6b55, 0x52c5f7aa, 0x528cabc3, 0x52538786,
+0x521a8ad7, 0x51e1b59a, 0x51a907b4, 0x5170810b,
+0x51382182, 0x50ffe8fe, 0x50c7d765, 0x508fec9c,
+0x50582888, 0x50208b0e, 0x4fe91413, 0x4fb1c37c,
+0x4f7a9930, 0x4f439514, 0x4f0cb70c, 0x4ed5ff00,
+0x4e9f6cd4, 0x4e69006e, 0x4e32b9b4, 0x4dfc988c,
+0x4dc69cdd, 0x4d90c68b, 0x4d5b157e, 0x4d25899c,
+0x4cf022ca, 0x4cbae0ef, 0x4c85c3f1, 0x4c50cbb8,
+0x4c1bf829, 0x4be7492b, 0x4bb2bea5, 0x4b7e587d,
+0x4b4a169c, 0x4b15f8e6, 0x4ae1ff43, 0x4aae299b,
+0x4a7a77d5, 0x4a46e9d6, 0x4a137f88, 0x49e038d0,
+0x49ad1598, 0x497a15c4, 0x4947393f, 0x49147fee,
+0x48e1e9ba, 0x48af768a, 0x487d2646, 0x484af8d6,
+0x4818ee22, 0x47e70611, 0x47b5408c, 0x47839d7b,
+0x47521cc6, 0x4720be55, 0x46ef8210, 0x46be67e0,
+0x468d6fae, 0x465c9961, 0x462be4e2, 0x45fb521a,
+0x45cae0f2, 0x459a9152, 0x456a6323, 0x453a564d,
+0x450a6abb, 0x44daa054, 0x44aaf702, 0x447b6ead,
+0x444c0740, 0x441cc0a3, 0x43ed9ac0, 0x43be9580,
+0x438fb0cb, 0x4360ec8d, 0x433248ae, 0x4303c517,
+0x42d561b4, 0x42a71e6c, 0x4278fb2b, 0x424af7da,
+0x421d1462, 0x41ef50ae, 0x41c1aca8, 0x41942839,
+0x4166c34c, 0x41397dcc, 0x410c57a2, 0x40df50b8,
+0x40b268fa, 0x4085a051, 0x4058f6a8, 0x402c6be9
 };
 
 /*!
- 
-  \brief calculates 2 ^ (x/y) for x<=0, y > 0, x <= 32768 * y 
-  
+
+  \brief calculates 2 ^ (x/y) for x<=0, y > 0, x <= 32768 * y
+
   avoids integer division
-  
-  \return 
+
+  \return
 */
 Word32 pow2_xy(Word32 x, Word32 y)
 {
@@ -355,7 +355,7 @@ Word32 pow2_xy(Word32 x, Word32 y)
   fPart = tmp2 - iPart*y;
   iPart = min(iPart,INT_BITS-1);
 
-  res = pow2Table[(POW2_TABLE_SIZE*fPart)/y] >> iPart; 
- 
+  res = pow2Table[(POW2_TABLE_SIZE*fPart)/y] >> iPart;
+
   return(res);
 }
\ No newline at end of file
diff --git a/media/libstagefright/codecs/aacenc/basic_op/oper_32b.h b/media/libstagefright/codecs/aacenc/basic_op/oper_32b.h
index 1d35e5e..9ebd1c2 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/oper_32b.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/oper_32b.h
@@ -51,21 +51,21 @@ __inline Word32 L_mpy_ls(Word32 L_var2, Word16 var1)
     swHigh1 = (Word16)(L_var2 >> 16);
 
     l_var_out = (long)swLow1 * (long)var1 >> 15;
-    
+
     l_var_out += swHigh1 * var1 << 1;
-    
+
     return(l_var_out);
 }
 
 __inline Word32 L_mpy_wx(Word32 L_var2, Word16 var1)
 {
 #if ARMV5TE_L_MPY_LS
-	Word32 result; 
-	asm volatile( 
-		"SMULWB  %[result], %[L_var2], %[var1] \n" 
+	Word32 result;
+	asm volatile(
+		"SMULWB  %[result], %[L_var2], %[var1] \n"
 		:[result]"+r"(result)
 		:[L_var2]"r"(L_var2), [var1]"r"(var1)
-		); 
+		);
 	return result;
 #else
     unsigned short swLow1;
@@ -75,9 +75,9 @@ __inline Word32 L_mpy_wx(Word32 L_var2, Word16 var1)
     swLow1 = (unsigned short)(L_var2);
     swHigh1 = (Word16)(L_var2 >> 16);
 
-    l_var_out = (long)swLow1 * (long)var1 >> 16;    
+    l_var_out = (long)swLow1 * (long)var1 >> 16;
     l_var_out += swHigh1 * var1;
-    
+
     return(l_var_out);
 #endif
 }
diff --git a/media/libstagefright/codecs/aacenc/basic_op/typedef.h b/media/libstagefright/codecs/aacenc/basic_op/typedef.h
index 1030803..b1f8225 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/typedef.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/typedef.h
@@ -30,7 +30,7 @@
 /*
  * this is the original code from the ETSI file typedef.h
  */
-   
+
 #if defined(__BORLANDC__) || defined(__WATCOMC__) || defined(_MSC_VER) || defined(__ZTC__)
 typedef signed char Word8;
 typedef short Word16;
diff --git a/media/libstagefright/codecs/aacenc/basic_op/typedefs.h b/media/libstagefright/codecs/aacenc/basic_op/typedefs.h
index c7e774b..c924e2c 100644
--- a/media/libstagefright/codecs/aacenc/basic_op/typedefs.h
+++ b/media/libstagefright/codecs/aacenc/basic_op/typedefs.h
@@ -55,7 +55,7 @@
 #define INT_BITS   32
 /*
 ********************************************************************************
-*                         DEFINITION OF CONSTANTS 
+*                         DEFINITION OF CONSTANTS
 ********************************************************************************
 */
 /*
@@ -120,12 +120,12 @@ typedef unsigned __int64 UWord64;
     #define ARMV5TE_L_MULT        1
     #define ARMV5TE_L_MAC         1
     #define ARMV5TE_L_MSU         1
-   
-    
+
+
     #define ARMV5TE_DIV_S         1
     #define ARMV5TE_ROUND         1
     #define ARMV5TE_MULT          1
-    
+
     #define ARMV5TE_NORM_S        1
     #define ARMV5TE_NORM_L        1
 	#define ARMV5TE_L_MPY_LS	  1
@@ -149,7 +149,7 @@ typedef unsigned __int64 UWord64;
 #define ROUND_IS_INLINE                 1   //define round as inline function
 #define L_MAC_IS_INLINE                 1   //define L_mac as inline function
 #define L_ADD_IS_INLINE                 1   //define L_add as inline function
-#define EXTRACT_H_IS_INLINE             1   //define extract_h as inline function 
+#define EXTRACT_H_IS_INLINE             1   //define extract_h as inline function
 #define EXTRACT_L_IS_INLINE             1   //define extract_l as inline function        //???
 #define MULT_R_IS_INLINE                1   //define mult_r as inline function
 #define SHR_R_IS_INLINE                 1   //define shr_r as inline function