1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
101
102
103
104
105
106
107
108
109
110
111
112
113
114
115
116
117
118
119
120
121
122
123
124
125
126
127
128
129
130
131
132
133
134
135
136
137
138
139
140
141
142
143
144
145
146
147
148
149
150
151
152
153
154
155
156
157
158
159
160
161
162
163
164
165
166
167
168
169
170
171
172
173
174
175
176
177
178
179
180
181
182
183
184
185
186
187
188
189
190
191
192
193
194
195
196
197
198
199
200
201
202
203
204
205
206
207
208
209
210
211
212
213
214
215
216
217
218
219
220
221
222
223
224
225
226
227
228
229
230
231
232
233
234
235
236
237
238
239
240
241
242
243
244
245
246
247
248
249
250
251
252
253
254
255
256
257
258
259
260
261
262
263
264
265
266
267
268
269
270
271
272
273
274
275
276
277
278
279
280
281
282
283
284
285
286
287
288
289
290
291
292
293
294
295
296
297
298
299
300
301
302
303
304
305
306
307
308
309
310
311
312
313
314
315
316
317
318
319
320
321
322
323
324
325
326
327
328
329
330
331
332
333
334
335
336
337
338
339
340
341
342
343
344
345
346
347
348
349
350
351
352
353
354
355
356
357
358
359
360
361
362
363
364
365
366
367
368
369
370
371
372
373
374
375
376
377
378
379
380
381
382
383
384
385
386
387
388
389
390
391
392
393
394
395
396
397
398
399
400
401
402
403
404
405
406
407
408
409
410
411
412
413
414
415
416
417
418
419
420
421
422
423
424
425
426
427
428
429
430
431
432
433
434
435
436
437
438
439
440
441
442
443
444
445
446
447
448
449
450
|
/* ------------------------------------------------------------------
* Copyright (C) 1998-2009 PacketVideo
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either
* express or implied.
* See the License for the specific language governing permissions
* and limitations under the License.
* -------------------------------------------------------------------
*/
/*
Pathname: ./c/include/fxp_mul32_arm_v5.h
------------------------------------------------------------------------------
REVISION HISTORY
Who: Date:
Description:
------------------------------------------------------------------------------
INCLUDE DESCRIPTION
------------------------------------------------------------------------------
*/
#ifndef FXP_MUL32_ARM_V5
#define FXP_MUL32_ARM_V5
#ifdef __cplusplus
extern "C"
{
#endif
#include "pv_audio_type_defs.h"
#if defined(PV_ARM_V5)
//#undef EXTENDED_ASM
#define EXTENDED_ASM
#define _ARM_V5_
__inline Int32 shft_lft_1(Int32 L_var1)
{
__asm
{
qadd L_var1, L_var1, L_var1
}
return L_var1;
}
__inline Int32 fxp_mul_16_by_16(Int32 L_var1, Int32 L_var2)
{
__asm
{
smulbb L_var1, L_var1, L_var2
}
return L_var1;
}
__inline Int32 fxp_mul_16_by_16bb(Int32 L_var1, Int32 L_var2)
{
__asm
{
smulbb L_var1, L_var1, L_var2
}
return L_var1;
}
__inline Int32 fxp_mul_16_by_16tb(Int32 L_var1, Int32 L_var2)
{
__asm
{
smultb L_var1, L_var1, L_var2
}
return L_var1;
}
__inline Int32 fxp_mul_16_by_16tt(Int32 L_var1, Int32 L_var2)
{
__asm
{
smultt L_var1, L_var1, L_var2
}
return L_var1;
}
__inline Int32 fxp_mul_16_by_16bt(Int32 L_var1, Int32 L_var2)
{
__asm
{
smulbt L_var1, L_var1, L_var2
}
return L_var1;
}
__inline Int32 fxp_mac_16_by_16(const Int32 L_var1, const Int32 L_var2, Int32 L_add)
{
__asm
{
smlabb L_add, L_var1, L_var2, L_add
}
return (L_add);
}
__inline Int32 fxp_mac_16_by_16_bb(const Int32 L_var1, Int32 L_var2, Int32 L_add)
{
__asm
{
smlabb L_add, L_var1, L_var2, L_add
}
return L_add;
}
__inline Int32 fxp_mac_16_by_16_bt(const Int32 L_var1, Int32 L_var2, Int32 L_add)
{
__asm
{
smlabt L_add, L_var1, L_var2, L_add
}
return L_add;
}
__inline Int32 fxp_mac_16_by_16_tb(const Int32 L_var1, Int32 L_var2, Int32 L_add)
{
__asm
{
smlatb L_add, L_var1, L_var2, L_add
}
return L_add;
}
__inline Int32 fxp_mac_16_by_16_tt(const Int32 L_var1, Int32 L_var2, Int32 L_add)
{
__asm
{
smlatt L_add, L_var1, L_var2, L_add
}
return L_add;
}
__inline Int32 fxp_mac32_by_16(Int32 L_var1, const Int32 L_var2, Int32 L_add)
{
__asm
{
smlawb L_add, L_var1, L_var2, L_add
}
return (L_add);
}
__inline int64 fxp_mac64_Q31(int64 sum, const Int32 L_var1, const Int32 L_var2)
{
uint32 b = (UInt32)(sum);
int32 c = Int32(sum >> 32);
__asm
{
smlal b, c, L_var1, L_var2
}
return (((int64(c)) << 32) | b);
}
__inline Int32 fxp_mac32_Q31(Int32 L_add, Int32 L_var1, const Int32 L_var2)
{
__asm
{
smlal L_var1, L_add, L_var2, L_var1
}
return L_add;
}
__inline Int32 fxp_msu32_Q31(Int32 L_sub, Int32 L_var1, const Int32 L_var2)
{
__asm
{
rsb L_var1, L_var1, #0
smlal L_var1, L_sub, L_var2, L_var1
}
return L_sub;
}
__inline Int32 fxp_mul32_Q31(Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
__asm
{
smull L_var1, result64_hi, L_var2, L_var1
}
return (result64_hi);
}
__inline Int32 fxp_mul32_Q30(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #2
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #30
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #30
#endif
}
return (result64_hi);
}
__inline Int32 fxp_mac32_Q30(const Int32 L_var1, const Int32 L_var2, Int32 L_add)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
add L_add, L_add, result64_hi, asl #2
add L_add, L_add, result64_lo, lsr #30
}
return (L_add);
}
__inline Int32 fxp_mul32_Q29(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #3
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #29
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #29
#endif
}
return (result64_hi);
}
__inline Int32 fxp_mac32_Q29(const Int32 L_var1, const Int32 L_var2, Int32 L_add)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
add L_add, L_add, result64_hi, asl #3
add L_add, L_add, result64_lo, lsr #29
}
return (L_add);
}
__inline Int32 fxp_msu32_Q29(const Int32 L_var1, const Int32 L_var2, Int32 L_sub)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
sub L_sub, L_sub, result64_hi, asl #3
sub L_sub, L_sub, result64_lo, lsr #29
}
return (L_sub);
}
__inline Int32 fxp_mul32_Q28(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #4
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #28
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #28
#endif
}
return (result64_hi);
}
__inline Int32 fxp_mul32_Q27(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #5
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #27
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #27
#endif
}
return (result64_hi);
}
__inline Int32 fxp_mul32_Q26(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #6
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #26
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #26
#endif
}
return (result64_hi);
}
__inline Int32 fxp_mul32_Q20(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #12
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #20
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #20
#endif
}
return (result64_hi);
}
__inline Int32 fxp_mul32_by_16(Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
__asm
{
smulwb result64_hi, L_var1, L_var2
}
return (result64_hi);
}
#define fxp_mul32_by_16b( a, b) fxp_mul32_by_16(a, b)
__inline Int32 fxp_mul32_by_16t(Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
__asm
{
smulwt result64_hi, L_var1, L_var2
}
return (result64_hi);
}
__inline Int32 fxp_mul32_Q15(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #17
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #15
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #15
#endif
}
return (result64_hi);
}
__inline Int32 cmplx_mul32_by_16(Int32 L_var1, const Int32 L_var2, const Int32 cmplx)
{
Int32 result64_hi;
__asm
{
smulwt result64_hi, L_var1, cmplx
smlawb result64_hi, L_var2, cmplx, result64_hi
}
return (result64_hi);
}
__inline Int32 fxp_mul32_Q14(const Int32 L_var1, const Int32 L_var2)
{
Int32 result64_hi;
Int32 result64_lo;
__asm
{
smull result64_lo, result64_hi, L_var2, L_var1
mov result64_hi, result64_hi, asl #18
#ifdef EXTENDED_ASM
mov result64_lo, result64_lo, lsr #14
orr result64_hi, result64_lo, result64_hi
#else
orr result64_hi, result64_hi, result64_lo, lsr #14
#endif
}
return (result64_hi);
}
#define preload_cache( a)
#endif
#ifdef __cplusplus
}
#endif
#endif /* FXP_MUL32 */
|
