diff options
| author | Maxime Bizon <mbizon@freebox.fr> | 2012-10-19 10:45:07 +0200 |
|---|---|---|
| committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2012-10-24 11:34:51 -0700 |
| commit | 08ec212c0f92cbf30e3ecc7349f18151714041d6 (patch) | |
| tree | 625afda99083d4c04aa3899b1470f6d03135e052 | |
| parent | 7a0c4edae99da6ab3d402deb0d88410251c6ac63 (diff) | |
| download | kernel_goldelico_gta04-08ec212c0f92cbf30e3ecc7349f18151714041d6.zip kernel_goldelico_gta04-08ec212c0f92cbf30e3ecc7349f18151714041d6.tar.gz kernel_goldelico_gta04-08ec212c0f92cbf30e3ecc7349f18151714041d6.tar.bz2 | |
x86: ce4100: allow second UART usage
The current CE4100 and 8250_pci code have both a limitation preventing the
registration and usage of CE4100's second UART. This patch changes the
platform code fixing up the UART port to work on a relative UART port
base address, as well as the 8250_pci code to make it register 2 UART ports
for CE4100 and pass the port index down to all consumers.
Signed-off-by: Florian Fainelli <ffainelli@freebox.fr>
Acked-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
| -rw-r--r-- | arch/x86/platform/ce4100/ce4100.c | 3 | ||||
| -rw-r--r-- | drivers/tty/serial/8250/8250_pci.c | 6 |
2 files changed, 6 insertions, 3 deletions
diff --git a/arch/x86/platform/ce4100/ce4100.c b/arch/x86/platform/ce4100/ce4100.c index 4c61b52..0dcc30e 100644 --- a/arch/x86/platform/ce4100/ce4100.c +++ b/arch/x86/platform/ce4100/ce4100.c @@ -92,8 +92,11 @@ static void ce4100_serial_fixup(int port, struct uart_port *up, up->membase = (void __iomem *)__fix_to_virt(FIX_EARLYCON_MEM_BASE); up->membase += up->mapbase & ~PAGE_MASK; + up->mapbase += port * 0x100; + up->membase += port * 0x100; up->iotype = UPIO_MEM32; up->regshift = 2; + up->irq = 4; } #endif up->iobase = 0; diff --git a/drivers/tty/serial/8250/8250_pci.c b/drivers/tty/serial/8250/8250_pci.c index 17b7d26..cec8852 100644 --- a/drivers/tty/serial/8250/8250_pci.c +++ b/drivers/tty/serial/8250/8250_pci.c @@ -1068,7 +1068,7 @@ ce4100_serial_setup(struct serial_private *priv, { int ret; - ret = setup_port(priv, port, 0, 0, board->reg_shift); + ret = setup_port(priv, port, idx, 0, board->reg_shift); port->port.iotype = UPIO_MEM32; port->port.type = PORT_XSCALE; port->port.flags = (port->port.flags | UPF_FIXED_PORT | UPF_FIXED_TYPE); @@ -2658,8 +2658,8 @@ static struct pciserial_board pci_boards[] __devinitdata = { .first_offset = 0x1000, }, [pbn_ce4100_1_115200] = { - .flags = FL_BASE0, - .num_ports = 1, + .flags = FL_BASE_BARS, + .num_ports = 2, .base_baud = 921600, .reg_shift = 2, }, |