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| author | Peter Zijlstra <a.p.zijlstra@chello.nl> | 2011-10-07 13:36:40 +0200 |
|---|---|---|
| committer | Ingo Molnar <mingo@elte.hu> | 2011-11-14 13:01:20 +0100 |
| commit | 57d1c0c03c6b48b2b96870d831b9ce6b917f53ac (patch) | |
| tree | 80039cd44137c39e4ab400e642ee3751cb870f50 | |
| parent | 7f80850d3f9fd8fda23a317044aef3a6bafab06b (diff) | |
| download | kernel_goldelico_gta04-57d1c0c03c6b48b2b96870d831b9ce6b917f53ac.zip kernel_goldelico_gta04-57d1c0c03c6b48b2b96870d831b9ce6b917f53ac.tar.gz kernel_goldelico_gta04-57d1c0c03c6b48b2b96870d831b9ce6b917f53ac.tar.bz2 | |
perf/x86: Fix PEBS instruction unwind
Masami spotted that we always try to decode the instruction stream as
64bit instructions when running a 64bit kernel, this doesn't work for
ia32-compat proglets.
Use TIF_IA32 to detect if we need to use the 32bit instruction
decoder.
Reported-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Cc: stable@kernel.org
Signed-off-by: Peter Zijlstra <a.p.zijlstra@chello.nl>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
| -rw-r--r-- | arch/x86/kernel/cpu/perf_event_intel_ds.c | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/arch/x86/kernel/cpu/perf_event_intel_ds.c b/arch/x86/kernel/cpu/perf_event_intel_ds.c index c0d238f..73da6b6 100644 --- a/arch/x86/kernel/cpu/perf_event_intel_ds.c +++ b/arch/x86/kernel/cpu/perf_event_intel_ds.c @@ -493,6 +493,7 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs) unsigned long from = cpuc->lbr_entries[0].from; unsigned long old_to, to = cpuc->lbr_entries[0].to; unsigned long ip = regs->ip; + int is_64bit = 0; /* * We don't need to fixup if the PEBS assist is fault like @@ -544,7 +545,10 @@ static int intel_pmu_pebs_fixup_ip(struct pt_regs *regs) } else kaddr = (void *)to; - kernel_insn_init(&insn, kaddr); +#ifdef CONFIG_X86_64 + is_64bit = kernel_ip(to) || !test_thread_flag(TIF_IA32); +#endif + insn_init(&insn, kaddr, is_64bit); insn_get_length(&insn); to += insn.length; } while (to < ip); |