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| author | Mike Rapoport <mike@compulab.co.il> | 2010-11-15 11:48:32 +0200 |
|---|---|---|
| committer | Nicolas Pitre <nico@fluxnic.net> | 2010-12-15 10:32:12 -0500 |
| commit | 8d4ce4cd7480ccd8412d4391d063733d6fc52f5c (patch) | |
| tree | 2af05a1ba982f596931de726805850e5c227b1dd | |
| parent | ce56d169976488e888878eed5f1bc304cf116c43 (diff) | |
| download | kernel_goldelico_gta04-8d4ce4cd7480ccd8412d4391d063733d6fc52f5c.zip kernel_goldelico_gta04-8d4ce4cd7480ccd8412d4391d063733d6fc52f5c.tar.gz kernel_goldelico_gta04-8d4ce4cd7480ccd8412d4391d063733d6fc52f5c.tar.bz2 | |
[ARM] Dove: add support for GPIOs 64-71
Signed-off-by: Mike Rapoport <mike@compulab.co.il>
Acked-by: Saeed Bishara <saeed@marvell.com>
Signed-off-by: Nicolas Pitre <nico@fluxnic.net>
| -rw-r--r-- | arch/arm/mach-dove/include/mach/dove.h | 1 | ||||
| -rw-r--r-- | arch/arm/mach-dove/include/mach/gpio.h | 6 |
2 files changed, 5 insertions, 2 deletions
diff --git a/arch/arm/mach-dove/include/mach/dove.h b/arch/arm/mach-dove/include/mach/dove.h index f6a0839..148f4f0 100644 --- a/arch/arm/mach-dove/include/mach/dove.h +++ b/arch/arm/mach-dove/include/mach/dove.h @@ -131,6 +131,7 @@ #define DOVE_RESET_SAMPLE_LO (DOVE_MPP_VIRT_BASE | 0x014) #define DOVE_RESET_SAMPLE_HI (DOVE_MPP_VIRT_BASE | 0x018) #define DOVE_GPIO_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xd0400) +#define DOVE_GPIO2_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe8400) #define DOVE_MPP_GENERAL_VIRT_BASE (DOVE_SB_REGS_VIRT_BASE | 0xe803c) #define DOVE_AU1_SPDIFO_GPIO_EN (1 << 1) #define DOVE_NAND_GPIO_EN (1 << 0) diff --git a/arch/arm/mach-dove/include/mach/gpio.h b/arch/arm/mach-dove/include/mach/gpio.h index 0ee70ff..340bb7a 100644 --- a/arch/arm/mach-dove/include/mach/gpio.h +++ b/arch/arm/mach-dove/include/mach/gpio.h @@ -14,12 +14,14 @@ #include <plat/gpio.h> #include <asm-generic/gpio.h> /* cansleep wrappers */ -#define GPIO_MAX 64 +#define GPIO_MAX 72 #define GPIO_BASE_LO (DOVE_GPIO_VIRT_BASE + 0x00) #define GPIO_BASE_HI (DOVE_GPIO_VIRT_BASE + 0x20) -#define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : GPIO_BASE_HI) +#define GPIO_BASE(pin) ((pin < 32) ? GPIO_BASE_LO : \ + ((pin < 64) ? GPIO_BASE_HI : \ + DOVE_GPIO2_VIRT_BASE)) #define GPIO_OUT(pin) (GPIO_BASE(pin) + 0x00) #define GPIO_IO_CONF(pin) (GPIO_BASE(pin) + 0x04) |