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| author | Avi Kivity <avi@qumranet.com> | 2008-03-18 11:05:52 +0200 |
|---|---|---|
| committer | Avi Kivity <avi@qumranet.com> | 2008-04-27 12:00:33 +0300 |
| commit | 947da53830690cbd77d7f2b625d0df1f161ffd54 (patch) | |
| tree | 32db5b7e97b5df34ada31ac9de8f3250b90dfd55 | |
| parent | 97646202bc3f190dfcb48a3d506ea2445717d392 (diff) | |
| download | kernel_goldelico_gta04-947da53830690cbd77d7f2b625d0df1f161ffd54.zip kernel_goldelico_gta04-947da53830690cbd77d7f2b625d0df1f161ffd54.tar.gz kernel_goldelico_gta04-947da53830690cbd77d7f2b625d0df1f161ffd54.tar.bz2 | |
KVM: MMU: Set the accessed bit on non-speculative shadow ptes
If we populate a shadow pte due to a fault (and not speculatively due to a
pte write) then we can set the accessed bit on it, as we know it will be
set immediately on the next guest instruction. This saves a read-modify-write
operation.
Signed-off-by: Avi Kivity <avi@qumranet.com>
| -rw-r--r-- | arch/x86/kvm/mmu.c | 8 | ||||
| -rw-r--r-- | arch/x86/kvm/paging_tmpl.h | 4 |
2 files changed, 7 insertions, 5 deletions
diff --git a/arch/x86/kvm/mmu.c b/arch/x86/kvm/mmu.c index 072e942..a5872b3 100644 --- a/arch/x86/kvm/mmu.c +++ b/arch/x86/kvm/mmu.c @@ -1020,7 +1020,7 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, unsigned pt_access, unsigned pte_access, int user_fault, int write_fault, int dirty, int *ptwrite, int largepage, gfn_t gfn, - struct page *page) + struct page *page, bool speculative) { u64 spte; int was_rmapped = 0; @@ -1061,6 +1061,8 @@ static void mmu_set_spte(struct kvm_vcpu *vcpu, u64 *shadow_pte, * demand paging). */ spte = PT_PRESENT_MASK | PT_DIRTY_MASK; + if (!speculative) + pte_access |= PT_ACCESSED_MASK; if (!dirty) pte_access &= ~ACC_WRITE_MASK; if (!(pte_access & ACC_EXEC_MASK)) @@ -1148,13 +1150,13 @@ static int __direct_map(struct kvm_vcpu *vcpu, gpa_t v, int write, if (level == 1) { mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, - 0, write, 1, &pt_write, 0, gfn, page); + 0, write, 1, &pt_write, 0, gfn, page, false); return pt_write; } if (largepage && level == 2) { mmu_set_spte(vcpu, &table[index], ACC_ALL, ACC_ALL, - 0, write, 1, &pt_write, 1, gfn, page); + 0, write, 1, &pt_write, 1, gfn, page, false); return pt_write; } diff --git a/arch/x86/kvm/paging_tmpl.h b/arch/x86/kvm/paging_tmpl.h index 57abbd0..e9ae5db 100644 --- a/arch/x86/kvm/paging_tmpl.h +++ b/arch/x86/kvm/paging_tmpl.h @@ -266,7 +266,7 @@ static void FNAME(update_pte)(struct kvm_vcpu *vcpu, struct kvm_mmu_page *page, get_page(npage); mmu_set_spte(vcpu, spte, page->role.access, pte_access, 0, 0, gpte & PT_DIRTY_MASK, NULL, largepage, gpte_to_gfn(gpte), - npage); + npage, true); } /* @@ -349,7 +349,7 @@ static u64 *FNAME(fetch)(struct kvm_vcpu *vcpu, gva_t addr, mmu_set_spte(vcpu, shadow_ent, access, walker->pte_access & access, user_fault, write_fault, walker->ptes[walker->level-1] & PT_DIRTY_MASK, - ptwrite, largepage, walker->gfn, page); + ptwrite, largepage, walker->gfn, page, false); return shadow_ent; } |