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| author | Suresh Siddha <suresh.b.siddha@intel.com> | 2012-09-10 10:40:08 -0700 |
|---|---|---|
| committer | H. Peter Anvin <hpa@linux.intel.com> | 2012-09-18 15:52:24 -0700 |
| commit | a8615af4bc3621cb01096541dafa6f68352ec2d9 (patch) | |
| tree | 2385c494b946cfb55b81ceade8346ea4abac49d4 | |
| parent | e00229819f306b1f86134095347e9187dc346bd1 (diff) | |
| download | kernel_goldelico_gta04-a8615af4bc3621cb01096541dafa6f68352ec2d9.zip kernel_goldelico_gta04-a8615af4bc3621cb01096541dafa6f68352ec2d9.tar.gz kernel_goldelico_gta04-a8615af4bc3621cb01096541dafa6f68352ec2d9.tar.bz2 | |
x86, fpu: remove cpu_has_xmm check in the fx_finit()
CPUs with FXSAVE but no XMM/MXCSR (Pentium II from Intel,
Crusoe/TM-3xxx/5xxx from Transmeta, and presumably some of the K6
generation from AMD) ever looked at the mxcsr field during
fxrstor/fxsave. So remove the cpu_has_xmm check in the fx_finit()
Reported-by: Al Viro <viro@zeniv.linux.org.uk>
Acked-by: H. Peter Anvin <hpa@zytor.com>
Signed-off-by: Suresh Siddha <suresh.b.siddha@intel.com>
Link: http://lkml.kernel.org/r/1347300665-6209-6-git-send-email-suresh.b.siddha@intel.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
| -rw-r--r-- | arch/x86/include/asm/fpu-internal.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/x86/include/asm/fpu-internal.h b/arch/x86/include/asm/fpu-internal.h index 0ca72f0..92f3c6e 100644 --- a/arch/x86/include/asm/fpu-internal.h +++ b/arch/x86/include/asm/fpu-internal.h @@ -109,8 +109,7 @@ static inline void fx_finit(struct i387_fxsave_struct *fx) { memset(fx, 0, xstate_size); fx->cwd = 0x37f; - if (cpu_has_xmm) - fx->mxcsr = MXCSR_DEFAULT; + fx->mxcsr = MXCSR_DEFAULT; } extern void __sanitize_i387_state(struct task_struct *); |