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| author | David Howells <dhowells@redhat.com> | 2009-06-11 13:08:32 +0100 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2009-06-11 09:02:20 -0700 |
| commit | fd4f683d045e053abb093f80d81afce30ceadad2 (patch) | |
| tree | 2904ce3549032b63cc0c0ec8f1d74ad82b741237 | |
| parent | 07a2039b8eb0af4ff464efd3dfd95de5c02648c6 (diff) | |
| download | kernel_goldelico_gta04-fd4f683d045e053abb093f80d81afce30ceadad2.zip kernel_goldelico_gta04-fd4f683d045e053abb093f80d81afce30ceadad2.tar.gz kernel_goldelico_gta04-fd4f683d045e053abb093f80d81afce30ceadad2.tar.bz2 | |
MN10300: Don't set the dirty bit in the DTLB entries in the TLB-miss handler
Remove the special handling for the Data TLB entry dirty bit in the TLB-miss
handler. As the code stands, all that it does is to cause us to take a second
data address exception to set the dirty bit. Instead, we can just let
pte_mkdirty() set the bit.
Signed-off-by: David Howells <dhowells@redhat.com>
Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
| -rw-r--r-- | arch/mn10300/mm/tlb-mn10300.S | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/arch/mn10300/mm/tlb-mn10300.S b/arch/mn10300/mm/tlb-mn10300.S index 7892080..7095147 100644 --- a/arch/mn10300/mm/tlb-mn10300.S +++ b/arch/mn10300/mm/tlb-mn10300.S @@ -165,24 +165,6 @@ ENTRY(itlb_aerror) ENTRY(dtlb_aerror) and ~EPSW_NMID,epsw add -4,sp - mov d1,(sp) - - movhu (MMUFCR_DFC),d1 # is it the initial valid write - # to this page? - and MMUFCR_xFC_INITWR,d1 - beq dtlb_pagefault # jump if not - - mov (DPTEL),d1 # set the dirty bit - # (don't replace with BSET!) - or _PAGE_DIRTY,d1 - mov d1,(DPTEL) - mov (sp),d1 - add 4,sp - rti - - ALIGN -dtlb_pagefault: - mov (sp),d1 SAVE_ALL add -4,sp # need to pass three params |