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authorArnd Bergmann <arnd@arndb.de>2012-07-06 22:18:38 +0200
committerArnd Bergmann <arnd@arndb.de>2012-07-06 22:18:38 +0200
commitefab093481d9cfc4e9e18a63657e3a2e66d49e5e (patch)
treedbde124ed0d245da3f7210fc3aa016acb9050fd0 /Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
parent6887a4131da3adaab011613776d865f4bcfb5678 (diff)
parent2553dcc6e603e3833990bd3a29bee98d1dbdf251 (diff)
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Merge branch 'for-3.6/boards' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra into next/boards
From Stephen Warren <swarren@wwwdotorg.org> This branch contains changes to Tegra board files, and related Kconfig and Makefile changes. Highlights include: * Removal of Seaboard/Springbank board files; these boards can now only be used with device tree. * Use of small parts of some non-DT board files from the DT board files. This enables all features that the non-DT board files have, when booting from DT. This will allow almost complete removal of all non-DT board files in v3.7. * Other miscellaneous changes. This branch is based on Tegra's for-3.6/cleanup branch from a previous pull request. * 'for-3.6/boards' of git://git.kernel.org/pub/scm/linux/kernel/git/swarren/linux-tegra: ARM: tegra: use of_default_bus_match_table ARM: tegra: add device tree AUXDATA for APBDMA ARM: tegra: paz00: enable WiFi rfkill when booting from device tree ARM: tegra: harmony: init regulators, PCIe when booting from DT ARM: tegra: trimslice: enable PCIe when booting from device tree ARM: tegra: remove Seaboard board files ARM: tegra: remove CONFIG_MACH_TEGRA_DT ARM: tegra: make .dts compilation depend on Tegra2 support Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt')
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diff --git a/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt b/Documentation/devicetree/bindings/gpio/nvidia,tegra20-gpio.txt
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+NVIDIA Tegra GPIO controller
+
+Required properties:
+- compatible : "nvidia,tegra<chip>-gpio"
+- reg : Physical base address and length of the controller's registers.
+- interrupts : The interrupt outputs from the controller. For Tegra20,
+ there should be 7 interrupts specified, and for Tegra30, there should
+ be 8 interrupts specified.
+- #gpio-cells : Should be two. The first cell is the pin number and the
+ second cell is used to specify optional parameters:
+ - bit 0 specifies polarity (0 for normal, 1 for inverted)
+- gpio-controller : Marks the device node as a GPIO controller.
+- #interrupt-cells : Should be 2.
+ The first cell is the GPIO number.
+ The second cell is used to specify flags:
+ bits[3:0] trigger type and level flags:
+ 1 = low-to-high edge triggered.
+ 2 = high-to-low edge triggered.
+ 4 = active high level-sensitive.
+ 8 = active low level-sensitive.
+ Valid combinations are 1, 2, 3, 4, 8.
+- interrupt-controller : Marks the device node as an interrupt controller.
+
+Example:
+
+gpio: gpio@6000d000 {
+ compatible = "nvidia,tegra20-gpio";
+ reg = < 0x6000d000 0x1000 >;
+ interrupts = < 0 32 0x04
+ 0 33 0x04
+ 0 34 0x04
+ 0 35 0x04
+ 0 55 0x04
+ 0 87 0x04
+ 0 89 0x04 >;
+ #gpio-cells = <2>;
+ gpio-controller;
+ #interrupt-cells = <2>;
+ interrupt-controller;
+};