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author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-01-05 14:16:48 +1100 |
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committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-01-05 14:16:48 +1100 |
commit | 4aa12f7b927c3cac0e0cf3503642597527d0ece0 (patch) | |
tree | d327446284dcce52ad3ea54ffe8a7dddfcb8b86d /Documentation/powerpc | |
parent | b58602a4bac012b5f4fc12fe6b46ab237b610d5d (diff) | |
parent | 068e8c9d02ee37c44a4d65279b3ae8188fb09e18 (diff) | |
download | kernel_goldelico_gta04-4aa12f7b927c3cac0e0cf3503642597527d0ece0.zip kernel_goldelico_gta04-4aa12f7b927c3cac0e0cf3503642597527d0ece0.tar.gz kernel_goldelico_gta04-4aa12f7b927c3cac0e0cf3503642597527d0ece0.tar.bz2 |
Merge commit 'kumar/kumar-next' into next
Diffstat (limited to 'Documentation/powerpc')
-rw-r--r-- | Documentation/powerpc/dts-bindings/fsl/board.txt | 32 |
1 files changed, 31 insertions, 1 deletions
diff --git a/Documentation/powerpc/dts-bindings/fsl/board.txt b/Documentation/powerpc/dts-bindings/fsl/board.txt index 81a917e..6c974d2 100644 --- a/Documentation/powerpc/dts-bindings/fsl/board.txt +++ b/Documentation/powerpc/dts-bindings/fsl/board.txt @@ -18,7 +18,7 @@ This is the memory-mapped registers for on board FPGA. Required properities: - compatible : should be "fsl,fpga-pixis". -- reg : should contain the address and the lenght of the FPPGA register +- reg : should contain the address and the length of the FPPGA register set. Example (MPC8610HPCD): @@ -27,3 +27,33 @@ Example (MPC8610HPCD): compatible = "fsl,fpga-pixis"; reg = <0xe8000000 32>; }; + +* Freescale BCSR GPIO banks + +Some BCSR registers act as simple GPIO controllers, each such +register can be represented by the gpio-controller node. + +Required properities: +- compatible : Should be "fsl,<board>-bcsr-gpio". +- reg : Should contain the address and the length of the GPIO bank + register. +- #gpio-cells : Should be two. The first cell is the pin number and the + second cell is used to specify optional paramters (currently unused). +- gpio-controller : Marks the port as GPIO controller. + +Example: + + bcsr@1,0 { + #address-cells = <1>; + #size-cells = <1>; + compatible = "fsl,mpc8360mds-bcsr"; + reg = <1 0 0x8000>; + ranges = <0 1 0 0x8000>; + + bcsr13: gpio-controller@d { + #gpio-cells = <2>; + compatible = "fsl,mpc8360mds-bcsr-gpio"; + reg = <0xd 1>; + gpio-controller; + }; + }; |