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authorVineet Gupta <vgupta@synopsys.com>2013-01-18 15:12:18 +0530
committerVineet Gupta <vgupta@synopsys.com>2013-02-11 20:00:39 +0530
commitd8005e6b95268cbb50db3773d5f180c32a9434fe (patch)
tree1e27f00970c3612521a4d29146948ef4cec05586 /arch/arc/kernel/clk.c
parentbf90e1eab682dcb79b7765989fb65835ce9d6165 (diff)
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ARC: Timers/counters/delay management
ARC700 includes 2 in-core 32bit timers TIMER0 and TIMER1. Both have exactly same capabilies. * programmable to count from TIMER<n>_CNT to TIMER<n>_LIMIT * for count 0 and LIMIT ~1, provides a free-running counter by auto-wrapping when limit is reached. * optionally interrupt when LIMIT is reached (oneshot event semantics) * rearming the interrupt provides periodic semantics * run at CPU clk ARC Linux uses TIMER0 for clockevent (periodic/oneshot) and TIMER1 for clocksource (free-running clock). Newer cores provide RTSC insn which gives a 64bit cpu clk snapshot hence is more apt for clocksource when available. SMP poses a bit of challenge for global timekeeping clocksource / sched_clock() backend: -TIMER1 based local clocks are out-of-sync hence can't be used (thus we default to jiffies based cs as well as sched_clock() one/both of which platform can override with it's specific hardware assist) -RTSC is only allowed in SMP if it's cross-core-sync (Kconfig glue ensures that) and thus usable for both requirements. Signed-off-by: Vineet Gupta <vgupta@synopsys.com> Cc: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'arch/arc/kernel/clk.c')
-rw-r--r--arch/arc/kernel/clk.c11
1 files changed, 11 insertions, 0 deletions
diff --git a/arch/arc/kernel/clk.c b/arch/arc/kernel/clk.c
new file mode 100644
index 0000000..64925db
--- /dev/null
+++ b/arch/arc/kernel/clk.c
@@ -0,0 +1,11 @@
+/*
+ * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ */
+
+#include <asm/clk.h>
+
+unsigned long core_freq = CONFIG_ARC_PLAT_CLK;