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| author | Catalin Marinas <catalin.marinas@arm.com> | 2011-09-05 17:52:36 +0100 |
|---|---|---|
| committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2011-10-06 15:40:06 +0100 |
| commit | d7c5d0dcffb3b5702d9477faceff4b8398e6fed0 (patch) | |
| tree | a1b670fac0f11868ff280380dca98db1c3926b46 /arch/arm/include/asm/pgtable-2level-hwdef.h | |
| parent | 442e70c0b3536e832547eed89629435462f4b515 (diff) | |
| download | kernel_goldelico_gta04-d7c5d0dcffb3b5702d9477faceff4b8398e6fed0.zip kernel_goldelico_gta04-d7c5d0dcffb3b5702d9477faceff4b8398e6fed0.tar.gz kernel_goldelico_gta04-d7c5d0dcffb3b5702d9477faceff4b8398e6fed0.tar.bz2 | |
ARM: 7077/1: LPAE: Use a mask for physical addresses in page table entries
With LPAE, the physical address mask is 40-bit while the page table
entry is 64-bit. This patch introduces PHYS_MASK for the 2-level page
table format, defined as ~0UL.
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/include/asm/pgtable-2level-hwdef.h')
| -rw-r--r-- | arch/arm/include/asm/pgtable-2level-hwdef.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/arch/arm/include/asm/pgtable-2level-hwdef.h b/arch/arm/include/asm/pgtable-2level-hwdef.h index 2b52c40..5cfba15 100644 --- a/arch/arm/include/asm/pgtable-2level-hwdef.h +++ b/arch/arm/include/asm/pgtable-2level-hwdef.h @@ -88,4 +88,6 @@ #define PTE_SMALL_AP_URO_SRW (_AT(pteval_t, 0xaa) << 4) #define PTE_SMALL_AP_URW_SRW (_AT(pteval_t, 0xff) << 4) +#define PHYS_MASK (~0UL) + #endif |