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author | Nicolas Ferre <nicolas.ferre@atmel.com> | 2009-07-24 11:43:00 +0100 |
---|---|---|
committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2009-09-21 16:02:14 +0100 |
commit | 6ff89e9d62014b0e21fad96cf4d72d68b3aa0d8c (patch) | |
tree | dab21b0760c053c3ffa668671cba6195ef5699e9 /arch/arm/mach-at91 | |
parent | 9e6c82cd3e1a739ef48bf8c1decc8e7a7d8de3ac (diff) | |
download | kernel_goldelico_gta04-6ff89e9d62014b0e21fad96cf4d72d68b3aa0d8c.zip kernel_goldelico_gta04-6ff89e9d62014b0e21fad96cf4d72d68b3aa0d8c.tar.gz kernel_goldelico_gta04-6ff89e9d62014b0e21fad96cf4d72d68b3aa0d8c.tar.bz2 |
ARM: 5620/1: at91/dmaengine: integration of at_hdmac driver in at91sam9rl
This is the integration of DMA engine driver into at91sam9rl device file. The
associated driver is at_hdmac.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Andrew Victor <linux@maxim.org.za>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-at91')
-rw-r--r-- | arch/arm/mach-at91/at91sam9rl_devices.c | 47 |
1 files changed, 47 insertions, 0 deletions
diff --git a/arch/arm/mach-at91/at91sam9rl_devices.c b/arch/arm/mach-at91/at91sam9rl_devices.c index 7281865..1c2dced 100644 --- a/arch/arm/mach-at91/at91sam9rl_devices.c +++ b/arch/arm/mach-at91/at91sam9rl_devices.c @@ -21,11 +21,57 @@ #include <mach/at91sam9rl.h> #include <mach/at91sam9rl_matrix.h> #include <mach/at91sam9_smc.h> +#include <mach/at_hdmac.h> #include "generic.h" /* -------------------------------------------------------------------- + * HDMAC - AHB DMA Controller + * -------------------------------------------------------------------- */ + +#if defined(CONFIG_AT_HDMAC) || defined(CONFIG_AT_HDMAC_MODULE) +static u64 hdmac_dmamask = DMA_BIT_MASK(32); + +static struct at_dma_platform_data atdma_pdata = { + .nr_channels = 2, +}; + +static struct resource hdmac_resources[] = { + [0] = { + .start = AT91_BASE_SYS + AT91_DMA, + .end = AT91_BASE_SYS + AT91_DMA + SZ_512 - 1, + .flags = IORESOURCE_MEM, + }, + [2] = { + .start = AT91SAM9RL_ID_DMA, + .end = AT91SAM9RL_ID_DMA, + .flags = IORESOURCE_IRQ, + }, +}; + +static struct platform_device at_hdmac_device = { + .name = "at_hdmac", + .id = -1, + .dev = { + .dma_mask = &hdmac_dmamask, + .coherent_dma_mask = DMA_BIT_MASK(32), + .platform_data = &atdma_pdata, + }, + .resource = hdmac_resources, + .num_resources = ARRAY_SIZE(hdmac_resources), +}; + +void __init at91_add_device_hdmac(void) +{ + dma_cap_set(DMA_MEMCPY, atdma_pdata.cap_mask); + platform_device_register(&at_hdmac_device); +} +#else +void __init at91_add_device_hdmac(void) {} +#endif + +/* -------------------------------------------------------------------- * USB HS Device (Gadget) * -------------------------------------------------------------------- */ @@ -1103,6 +1149,7 @@ void __init at91_add_device_serial(void) {} */ static int __init at91_add_standard_devices(void) { + at91_add_device_hdmac(); at91_add_device_rtc(); at91_add_device_rtt(); at91_add_device_watchdog(); |