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authorDavid S. Miller <davem@davemloft.net>2012-07-19 11:17:30 -0700
committerDavid S. Miller <davem@davemloft.net>2012-07-19 11:17:30 -0700
commitabaa72d7fd9a20a67b62e6afa0e746e27851dc33 (patch)
treeebe4134fcc93a6e205e6004b3e652d7a62281651 /arch/arm/mach-imx/clk-imx35.c
parent67da22d23fa6f3324e03bcd0580b914b2e4afbf3 (diff)
parent3e4b9459fb0e149c6b74c9e89399a8fc39a92b44 (diff)
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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts: drivers/net/ethernet/intel/ixgbevf/ixgbevf_main.c
Diffstat (limited to 'arch/arm/mach-imx/clk-imx35.c')
-rw-r--r--arch/arm/mach-imx/clk-imx35.c9
1 files changed, 8 insertions, 1 deletions
diff --git a/arch/arm/mach-imx/clk-imx35.c b/arch/arm/mach-imx/clk-imx35.c
index 920a8cc..c6422fb 100644
--- a/arch/arm/mach-imx/clk-imx35.c
+++ b/arch/arm/mach-imx/clk-imx35.c
@@ -201,7 +201,6 @@ int __init mx35_clocks_init()
pr_err("i.MX35 clk %d: register failed with %ld\n",
i, PTR_ERR(clk[i]));
-
clk_register_clkdev(clk[pata_gate], NULL, "pata_imx");
clk_register_clkdev(clk[can1_gate], NULL, "flexcan.0");
clk_register_clkdev(clk[can2_gate], NULL, "flexcan.1");
@@ -264,6 +263,14 @@ int __init mx35_clocks_init()
clk_prepare_enable(clk[iim_gate]);
clk_prepare_enable(clk[emi_gate]);
+ /*
+ * SCC is needed to boot via mmc after a watchdog reset. The clock code
+ * before conversion to common clk also enabled UART1 (which isn't
+ * handled here and not needed for mmc) and IIM (which is enabled
+ * unconditionally above).
+ */
+ clk_prepare_enable(clk[scc_gate]);
+
imx_print_silicon_rev("i.MX35", mx35_revision());
#ifdef CONFIG_MXC_USE_EPIT