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author | Sascha Hauer <s.hauer@pengutronix.de> | 2012-11-22 10:18:41 +0100 |
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committer | Sascha Hauer <s.hauer@pengutronix.de> | 2012-11-22 15:32:39 +0100 |
commit | 2b254693bef4f1299de0afb231890fe348df11c6 (patch) | |
tree | 33faef980ce73948ec96f32c9f4ae9c4ba5d9a12 /arch/arm/mach-imx/clk.h | |
parent | 7a04092c733fd72ded1294719046cfdb31feced3 (diff) | |
download | kernel_goldelico_gta04-2b254693bef4f1299de0afb231890fe348df11c6.zip kernel_goldelico_gta04-2b254693bef4f1299de0afb231890fe348df11c6.tar.gz kernel_goldelico_gta04-2b254693bef4f1299de0afb231890fe348df11c6.tar.bz2 |
ARM i.MX6: remove gate_mask from pllv3
Now that the additional enable bits in the enet PLL are handled
as gates, the gate_mask is identical for all plls. Remove the
gate_mask from the code and use the BM_PLL_ENABLE bit for
enabling/disabling the PLL.
Signed-off-by: Sascha Hauer <s.hauer@pengutronix.de>
Acked-by: Shawn Guo <shawn.guo@linaro.org>
Diffstat (limited to 'arch/arm/mach-imx/clk.h')
-rw-r--r-- | arch/arm/mach-imx/clk.h | 3 |
1 files changed, 1 insertions, 2 deletions
diff --git a/arch/arm/mach-imx/clk.h b/arch/arm/mach-imx/clk.h index 5f2d8ac..9d1f3b9 100644 --- a/arch/arm/mach-imx/clk.h +++ b/arch/arm/mach-imx/clk.h @@ -22,8 +22,7 @@ enum imx_pllv3_type { }; struct clk *imx_clk_pllv3(enum imx_pllv3_type type, const char *name, - const char *parent_name, void __iomem *base, u32 gate_mask, - u32 div_mask); + const char *parent_name, void __iomem *base, u32 div_mask); struct clk *clk_register_gate2(struct device *dev, const char *name, const char *parent_name, unsigned long flags, |