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| author | Roland Stigge <stigge@antcom.de> | 2012-11-07 13:30:50 +0100 |
|---|---|---|
| committer | Roland Stigge <stigge@antcom.de> | 2012-11-07 13:30:50 +0100 |
| commit | 91deef8069e7ffafac4467200e1d37af1b2d7c56 (patch) | |
| tree | 00a157a03f8ed4282af83439f66c37f387c5aabf /arch/arm/mach-lpc32xx | |
| parent | e40ec953b6ac21257760730af8c36e2695e4beac (diff) | |
| download | kernel_goldelico_gta04-91deef8069e7ffafac4467200e1d37af1b2d7c56.zip kernel_goldelico_gta04-91deef8069e7ffafac4467200e1d37af1b2d7c56.tar.gz kernel_goldelico_gta04-91deef8069e7ffafac4467200e1d37af1b2d7c56.tar.bz2 | |
ARM: LPC32xx: Cleanup irq.c
This patch removes the IRQ mask initialization which is already done some lines
above.
This was actually a bug: The init was supposed to set the bits for the
(chained) SUB IRQs. But this is already fixed by the previous patch, doing this
implicitely via irq_set_chained_handler().
Signed-off-by: Roland Stigge <stigge@antcom.de>
Diffstat (limited to 'arch/arm/mach-lpc32xx')
| -rw-r--r-- | arch/arm/mach-lpc32xx/irq.c | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/arch/arm/mach-lpc32xx/irq.c b/arch/arm/mach-lpc32xx/irq.c index f062296..9ecb8f9 100644 --- a/arch/arm/mach-lpc32xx/irq.c +++ b/arch/arm/mach-lpc32xx/irq.c @@ -442,11 +442,6 @@ void __init lpc32xx_init_irq(void) lpc32xx_set_default_mappings(SIC1_APR_DEFAULT, SIC1_ATR_DEFAULT, 32); lpc32xx_set_default_mappings(SIC2_APR_DEFAULT, SIC2_ATR_DEFAULT, 64); - /* mask all interrupts except SUBIRQ */ - __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_MIC_BASE)); - __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC1_BASE)); - __raw_writel(0, LPC32XX_INTC_MASK(LPC32XX_SIC2_BASE)); - /* Initially disable all wake events */ __raw_writel(0, LPC32XX_CLKPWR_P01_ER); __raw_writel(0, LPC32XX_CLKPWR_INT_ER); |