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| author | Tony Lindgren <tony@atomide.com> | 2012-10-22 13:30:03 -0700 |
|---|---|---|
| committer | Tony Lindgren <tony@atomide.com> | 2012-10-22 13:37:37 -0700 |
| commit | 1d8643dd0548e8cb9114e53c353b09da016a72fb (patch) | |
| tree | e97a9578343f842b692539740dfa6399e250c5b7 /arch/arm/mach-omap2/mux34xx.c | |
| parent | 24942e8af19e5090374776a57db97b350ffd0fa6 (diff) | |
| download | kernel_goldelico_gta04-1d8643dd0548e8cb9114e53c353b09da016a72fb.zip kernel_goldelico_gta04-1d8643dd0548e8cb9114e53c353b09da016a72fb.tar.gz kernel_goldelico_gta04-1d8643dd0548e8cb9114e53c353b09da016a72fb.tar.bz2 | |
ARM: OMAP3: Fix 3430 legacy mux names for ssi1 signals.
On n900 uart1 pins are not not used for uart, instead they are
used to connect to a cell modem over ssi. Looks like we're
currently missing these signal names for 3430 for some reason,
and only have some of them listed for 3630. Obviously the signals
are there for 3430 if n900 is using them and they are documented
in some TRMs.
Note that these will eventually be replaced by device tree
based pinctrl-single.c driver. But for now these are needed
to verify the SSI pins for devices like Nokia N900.
Signed-off-by: Tony Lindgren <tony@atomide.com>
Diffstat (limited to 'arch/arm/mach-omap2/mux34xx.c')
| -rw-r--r-- | arch/arm/mach-omap2/mux34xx.c | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/arch/arm/mach-omap2/mux34xx.c b/arch/arm/mach-omap2/mux34xx.c index 17f80e4..c47140b 100644 --- a/arch/arm/mach-omap2/mux34xx.c +++ b/arch/arm/mach-omap2/mux34xx.c @@ -614,16 +614,16 @@ static struct omap_mux __initdata omap3_muxmodes[] = { "sys_off_mode", NULL, NULL, NULL, "gpio_9", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_CTS, 150, - "uart1_cts", NULL, NULL, NULL, + "uart1_cts", "ssi1_rdy_tx", NULL, NULL, "gpio_150", "hsusb3_tll_clk", NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_RTS, 149, - "uart1_rts", NULL, NULL, NULL, + "uart1_rts", "ssi1_flag_tx", NULL, NULL, "gpio_149", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_RX, 151, - "uart1_rx", NULL, "mcbsp1_clkr", "mcspi4_clk", + "uart1_rx", "ss1_wake_tx", "mcbsp1_clkr", "mcspi4_clk", "gpio_151", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART1_TX, 148, - "uart1_tx", NULL, NULL, NULL, + "uart1_tx", "ssi1_dat_tx", NULL, NULL, "gpio_148", NULL, NULL, "safe_mode"), _OMAP3_MUXENTRY(UART2_CTS, 144, "uart2_cts", "mcbsp3_dx", "gpt9_pwm_evt", NULL, |