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author | wanzongshun <mcuos.com@gmail.com> | 2008-12-03 03:55:38 +0100 |
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committer | Russell King <rmk+kernel@arm.linux.org.uk> | 2008-12-03 21:57:16 +0000 |
commit | 7ec80ddf0455ff3854a5ca524952d91b5eb676b2 (patch) | |
tree | be9c2a70b771a9d94844b7f37e63471e7bbaff6a /arch/arm/mach-w90x900/irq.c | |
parent | c5b84b3bb0c055d70dc9f1b5e900378bc9d059ea (diff) | |
download | kernel_goldelico_gta04-7ec80ddf0455ff3854a5ca524952d91b5eb676b2.zip kernel_goldelico_gta04-7ec80ddf0455ff3854a5ca524952d91b5eb676b2.tar.gz kernel_goldelico_gta04-7ec80ddf0455ff3854a5ca524952d91b5eb676b2.tar.bz2 |
[ARM] 5338/1: Add Nuvoton W90P910 Platform support
Add Nuvoton W90X900 ARM9 plat support to linux arm tree,
Now, this patch include only W90P910 EVB of W90P910 CPU,
Its driver is nothing.
Signed-off-by: Wan ZongShun <mcuos.com@gmail.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Diffstat (limited to 'arch/arm/mach-w90x900/irq.c')
-rw-r--r-- | arch/arm/mach-w90x900/irq.c | 76 |
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/arm/mach-w90x900/irq.c b/arch/arm/mach-w90x900/irq.c new file mode 100644 index 0000000..0b4fc19 --- /dev/null +++ b/arch/arm/mach-w90x900/irq.c @@ -0,0 +1,76 @@ +/* + * linux/arch/arm/mach-w90x900/irq.c + * + * based on linux/arch/arm/plat-s3c24xx/irq.c by Ben Dooks + * + * Copyright (c) 2008 Nuvoton technology corporation + * All rights reserved. + * + * Wan ZongShun <mcuos.com@gmail.com> + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + */ + +#include <linux/init.h> +#include <linux/module.h> +#include <linux/interrupt.h> +#include <linux/ioport.h> +#include <linux/ptrace.h> +#include <linux/sysdev.h> +#include <linux/io.h> + +#include <asm/irq.h> +#include <asm/mach/irq.h> + +#include <mach/hardware.h> +#include <mach/regs-irq.h> + +static void w90x900_irq_mask(unsigned int irq) +{ + __raw_writel(1 << irq, REG_AIC_MDCR); +} + +/* + * By the w90p910 spec,any irq,only write 1 + * to REG_AIC_EOSCR for ACK + */ + +static void w90x900_irq_ack(unsigned int irq) +{ + __raw_writel(0x01, REG_AIC_EOSCR); +} + +static void w90x900_irq_unmask(unsigned int irq) +{ + unsigned long mask; + + if (irq == IRQ_T_INT_GROUP) { + mask = __raw_readl(REG_AIC_GEN); + __raw_writel(TIME_GROUP_IRQ | mask, REG_AIC_GEN); + __raw_writel(1 << IRQ_T_INT_GROUP, REG_AIC_MECR); + } + __raw_writel(1 << irq, REG_AIC_MECR); +} + +static struct irq_chip w90x900_irq_chip = { + .ack = w90x900_irq_ack, + .mask = w90x900_irq_mask, + .unmask = w90x900_irq_unmask, +}; + +void __init w90x900_init_irq(void) +{ + int irqno; + + __raw_writel(0xFFFFFFFE, REG_AIC_MDCR); + + for (irqno = IRQ_WDT; irqno <= IRQ_ADC; irqno++) { + set_irq_chip(irqno, &w90x900_irq_chip); + set_irq_handler(irqno, handle_level_irq); + set_irq_flags(irqno, IRQF_VALID); + } +} |