diff options
| author | Arnd Bergmann <arnd@arndb.de> | 2012-02-24 12:39:18 +0000 |
|---|---|---|
| committer | Arnd Bergmann <arnd@arndb.de> | 2012-02-24 12:39:18 +0000 |
| commit | fdc24d4ba20499febb90ff17d3b75674026712f8 (patch) | |
| tree | 83cebb162add24be7b395090b4daca4bd752641b /arch/arm/mm/cache-v7.S | |
| parent | a5f17d1f4c2831b9b9bf8b1a537cdbac995d6e13 (diff) | |
| parent | 059289b260826deb43601644a7ad39c2608e6861 (diff) | |
| download | kernel_goldelico_gta04-fdc24d4ba20499febb90ff17d3b75674026712f8.zip kernel_goldelico_gta04-fdc24d4ba20499febb90ff17d3b75674026712f8.tar.gz kernel_goldelico_gta04-fdc24d4ba20499febb90ff17d3b75674026712f8.tar.bz2 | |
Merge branch 'vexpress-dt-v3.3-rc4' of git://git.linaro.org/people/pawelmoll/linux into next/dt
* 'vexpress-dt-v3.3-rc4' of git://git.linaro.org/people/pawelmoll/linux: (573 commits)
ARM: vexpress: Add Device Tree for V2P-CA15 core tile (TC1 variant)
ARM: vexpress: Add Device Tree for V2P-CA9 core tile
ARM: vexpress: Add Device Tree for V2P-CA5s core tile
ARM: vexpress: Motherboard RS1 memory map support
ARM: vexpress: Add Device Tree support
ARM: vexpress: Use FDT data in platform SMP calls
ARM: versatile: Map local timers using Device Tree when possible
ARM: vexpress: Get rid of MMIO_P2V
This adds full device tree boot support for the versatile express
platform, as has been awaited for a long time.
Conflicts:
arch/arm/mach-vexpress/core.h
The definition of AMBA_DEVICE was removed in one branch, and the
definition of MMIO_P2V was removed in the other branch.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Diffstat (limited to 'arch/arm/mm/cache-v7.S')
| -rw-r--r-- | arch/arm/mm/cache-v7.S | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/arch/arm/mm/cache-v7.S b/arch/arm/mm/cache-v7.S index 07c4bc8..7a24d39 100644 --- a/arch/arm/mm/cache-v7.S +++ b/arch/arm/mm/cache-v7.S @@ -54,9 +54,15 @@ loop1: and r1, r1, #7 @ mask of the bits for current cache only cmp r1, #2 @ see what cache we have at this level blt skip @ skip if no cache, or just i-cache +#ifdef CONFIG_PREEMPT + save_and_disable_irqs r9 @ make cssr&csidr read atomic +#endif mcr p15, 2, r10, c0, c0, 0 @ select current cache level in cssr isb @ isb to sych the new cssr&csidr mrc p15, 1, r1, c0, c0, 0 @ read the new csidr +#ifdef CONFIG_PREEMPT + restore_irqs_notrace r9 +#endif and r2, r1, #7 @ extract the length of the cache lines add r2, r2, #4 @ add 4 (line length offset) ldr r4, =0x3ff |