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| author | Pawel Moll <pawel.moll@arm.com> | 2012-05-10 17:12:07 +0100 |
|---|---|---|
| committer | Pawel Moll <pawel.moll@arm.com> | 2012-05-21 09:30:37 +0100 |
| commit | e29b65dbc5d0431e8f063fab19fafaaa744d55ce (patch) | |
| tree | a0e08c67f6b7f1d47fdf30cf3a95f730b825a6b7 /arch/arm | |
| parent | 76e10d158efb6d4516018846f60c2ab5501900bc (diff) | |
| download | kernel_goldelico_gta04-e29b65dbc5d0431e8f063fab19fafaaa744d55ce.zip kernel_goldelico_gta04-e29b65dbc5d0431e8f063fab19fafaaa744d55ce.tar.gz kernel_goldelico_gta04-e29b65dbc5d0431e8f063fab19fafaaa744d55ce.tar.bz2 | |
ARM: vexpress: Device Tree updates
* Added extra regs for A15 VGIC
* Added A15 architected timer node
* Split A5 and A9 TWD nodes into two separate ones for timer
and watchdog; interrupt definitions fixed on the way
* Fixed typo in A5 GIC compatible value
All the changes courtesy of Marc Zyngier.
Signed-off-by: Pawel Moll <pawel.moll@arm.com>
Diffstat (limited to 'arch/arm')
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts | 13 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca5s.dts | 13 | ||||
| -rw-r--r-- | arch/arm/boot/dts/vexpress-v2p-ca9.dts | 9 |
3 files changed, 28 insertions, 7 deletions
diff --git a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts index 941b161..7e1091d 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca15-tc1.dts @@ -73,7 +73,10 @@ #address-cells = <0>; interrupt-controller; reg = <0x2c001000 0x1000>, - <0x2c002000 0x100>; + <0x2c002000 0x1000>, + <0x2c004000 0x2000>, + <0x2c006000 0x2000>; + interrupts = <1 9 0xf04>; }; memory-controller@7ffd0000 { @@ -93,6 +96,14 @@ <0 91 4>; }; + timer { + compatible = "arm,armv7-timer"; + interrupts = <1 13 0xf08>, + <1 14 0xf08>, + <1 11 0xf08>, + <1 10 0xf08>; + }; + pmu { compatible = "arm,cortex-a15-pmu", "arm,cortex-a9-pmu"; interrupts = <0 68 4>, diff --git a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts index 6905e66d..18917a0 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca5s.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca5s.dts @@ -77,13 +77,18 @@ timer@2c000600 { compatible = "arm,cortex-a5-twd-timer"; - reg = <0x2c000600 0x38>; - interrupts = <1 2 0x304>, - <1 3 0x304>; + reg = <0x2c000600 0x20>; + interrupts = <1 13 0x304>; + }; + + watchdog@2c000620 { + compatible = "arm,cortex-a5-twd-wdt"; + reg = <0x2c000620 0x20>; + interrupts = <1 14 0x304>; }; gic: interrupt-controller@2c001000 { - compatible = "arm,corex-a5-gic", "arm,cortex-a9-gic"; + compatible = "arm,cortex-a5-gic", "arm,cortex-a9-gic"; #interrupt-cells = <3>; #address-cells = <0>; interrupt-controller; diff --git a/arch/arm/boot/dts/vexpress-v2p-ca9.dts b/arch/arm/boot/dts/vexpress-v2p-ca9.dts index da77869..3f0c736 100644 --- a/arch/arm/boot/dts/vexpress-v2p-ca9.dts +++ b/arch/arm/boot/dts/vexpress-v2p-ca9.dts @@ -105,8 +105,13 @@ timer@1e000600 { compatible = "arm,cortex-a9-twd-timer"; reg = <0x1e000600 0x20>; - interrupts = <1 2 0xf04>, - <1 3 0xf04>; + interrupts = <1 13 0xf04>; + }; + + watchdog@1e000620 { + compatible = "arm,cortex-a9-twd-wdt"; + reg = <0x1e000620 0x20>; + interrupts = <1 14 0xf04>; }; gic: interrupt-controller@1e001000 { |