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| author | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-01-30 11:16:16 +0100 |
|---|---|---|
| committer | Haavard Skinnemoen <hskinnemoen@atmel.com> | 2007-02-09 15:01:58 +0100 |
| commit | 7f9f4678637f9ee1a999cc0870c4668f32e1a7eb (patch) | |
| tree | 557c08cbc47b9936c3a8c2f550bb3acd8781332e /arch/avr32/boards | |
| parent | e7f70b8cc69b1bcc56ed8d70f8e3671ec3956374 (diff) | |
| download | kernel_goldelico_gta04-7f9f4678637f9ee1a999cc0870c4668f32e1a7eb.zip kernel_goldelico_gta04-7f9f4678637f9ee1a999cc0870c4668f32e1a7eb.tar.gz kernel_goldelico_gta04-7f9f4678637f9ee1a999cc0870c4668f32e1a7eb.tar.bz2 | |
[AVR32] Add PIOE device and reserve SDRAM pins
The PIOE device was left out before because it muxes SDRAM pins (and
is therefore a bit dangerous to mess with) and because no existing
drivers had any use for it.
It is needed for CompactFlash, however, and now that we have a way
to protect the SDRAM pins, it can be safely added.
Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
Diffstat (limited to 'arch/avr32/boards')
| -rw-r--r-- | arch/avr32/boards/atstk1000/atstk1002.c | 23 |
1 files changed, 23 insertions, 0 deletions
diff --git a/arch/avr32/boards/atstk1000/atstk1002.c b/arch/avr32/boards/atstk1000/atstk1002.c index 3787d6b..bca815f 100644 --- a/arch/avr32/boards/atstk1000/atstk1002.c +++ b/arch/avr32/boards/atstk1000/atstk1002.c @@ -19,6 +19,7 @@ #include <asm/setup.h> #include <asm/arch/board.h> #include <asm/arch/init.h> +#include <asm/arch/portmux.h> #define SW2_DEFAULT /* MMCI and UART_A available */ @@ -102,6 +103,28 @@ void __init setup_board(void) static int __init atstk1002_init(void) { + /* + * ATSTK1000 uses 32-bit SDRAM interface. Reserve the + * SDRAM-specific pins so that nobody messes with them. + */ + at32_reserve_pin(GPIO_PIN_PE(0)); /* DATA[16] */ + at32_reserve_pin(GPIO_PIN_PE(1)); /* DATA[17] */ + at32_reserve_pin(GPIO_PIN_PE(2)); /* DATA[18] */ + at32_reserve_pin(GPIO_PIN_PE(3)); /* DATA[19] */ + at32_reserve_pin(GPIO_PIN_PE(4)); /* DATA[20] */ + at32_reserve_pin(GPIO_PIN_PE(5)); /* DATA[21] */ + at32_reserve_pin(GPIO_PIN_PE(6)); /* DATA[22] */ + at32_reserve_pin(GPIO_PIN_PE(7)); /* DATA[23] */ + at32_reserve_pin(GPIO_PIN_PE(8)); /* DATA[24] */ + at32_reserve_pin(GPIO_PIN_PE(9)); /* DATA[25] */ + at32_reserve_pin(GPIO_PIN_PE(10)); /* DATA[26] */ + at32_reserve_pin(GPIO_PIN_PE(11)); /* DATA[27] */ + at32_reserve_pin(GPIO_PIN_PE(12)); /* DATA[28] */ + at32_reserve_pin(GPIO_PIN_PE(13)); /* DATA[29] */ + at32_reserve_pin(GPIO_PIN_PE(14)); /* DATA[30] */ + at32_reserve_pin(GPIO_PIN_PE(15)); /* DATA[31] */ + at32_reserve_pin(GPIO_PIN_PE(26)); /* SDCS */ + at32_add_system_devices(); #ifdef SW2_DEFAULT |