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authorBenjamin Herrenschmidt <benh@au1.ibm.com>2007-10-28 08:49:28 +1100
committerPaul Mackerras <paulus@samba.org>2007-11-08 14:15:30 +1100
commit20474abda6bb11396434593daf2f52679cf62edf (patch)
treec2d4c2bd279ea26abe06cb78138558f9273f59e3 /arch/avr32/kernel
parentfb293ae1c02dab78e714d50f2c37d7852d6f328a (diff)
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[POWERPC] Fix cache line vs. block size confusion
We had an historical confusion in the kernel between cache line and cache block size. The former is an implementation detail of the L1 cache which can be useful for performance optimisations, the later is the actual size on which the cache control instructions operate, which can be different. For some reason, we had a weird hack reading the right property on powermac and the wrong one on any other 64 bits (32 bits is unaffected as it only uses the cputable for cache block size infos at this stage). This fixes the booting-without-of.txt documentation to mention the right properties, and fixes the 64 bits initialization code to look for the block size first, with a fallback to the line size if the property is missing. Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org> Signed-off-by: Paul Mackerras <paulus@samba.org>
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