diff options
author | Mark Salter <msalter@redhat.com> | 2012-07-18 23:49:40 -0400 |
---|---|---|
committer | Mark Salter <msalter@redhat.com> | 2012-07-18 23:49:40 -0400 |
commit | f84f1f462bfaf0e45511f97ef54068b8539a7af6 (patch) | |
tree | b6013fba89b6cf8af72b58e3a97a7f4556c5a1c2 /arch/c6x | |
parent | b3f89562100ad7d8deecc5a97ac74db7708c1bba (diff) | |
download | kernel_goldelico_gta04-f84f1f462bfaf0e45511f97ef54068b8539a7af6.zip kernel_goldelico_gta04-f84f1f462bfaf0e45511f97ef54068b8539a7af6.tar.gz kernel_goldelico_gta04-f84f1f462bfaf0e45511f97ef54068b8539a7af6.tar.bz2 |
C6X: remove dependence on legacy IRQs
The core priority PIC code uses legacy irq support to facilitate direct
mapping of core hw interrupt numbers to linux interrupt numbers. This
patch removes the legacy irq usage and replaces it with a generic linear
mapping.
Signed-off-by: Mark Salter <msalter@redhat.com>
Diffstat (limited to 'arch/c6x')
-rw-r--r-- | arch/c6x/include/asm/irq.h | 2 | ||||
-rw-r--r-- | arch/c6x/kernel/irq.c | 21 |
2 files changed, 10 insertions, 13 deletions
diff --git a/arch/c6x/include/asm/irq.h b/arch/c6x/include/asm/irq.h index ab4577f..1324e62 100644 --- a/arch/c6x/include/asm/irq.h +++ b/arch/c6x/include/asm/irq.h @@ -34,8 +34,6 @@ */ #define NR_PRIORITY_IRQS 16 -#define NR_IRQS_LEGACY NR_PRIORITY_IRQS - /* Total number of virq in the platform */ #define NR_IRQS 256 diff --git a/arch/c6x/kernel/irq.c b/arch/c6x/kernel/irq.c index c90fb5e..247e0eb 100644 --- a/arch/c6x/kernel/irq.c +++ b/arch/c6x/kernel/irq.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2011 Texas Instruments Incorporated + * Copyright (C) 2011-2012 Texas Instruments Incorporated * * This borrows heavily from powerpc version, which is: * @@ -35,9 +35,7 @@ static DEFINE_RAW_SPINLOCK(core_irq_lock); static void mask_core_irq(struct irq_data *data) { - unsigned int prio = data->irq; - - BUG_ON(prio < 4 || prio >= NR_PRIORITY_IRQS); + unsigned int prio = data->hwirq; raw_spin_lock(&core_irq_lock); and_creg(IER, ~(1 << prio)); @@ -46,7 +44,7 @@ static void mask_core_irq(struct irq_data *data) static void unmask_core_irq(struct irq_data *data) { - unsigned int prio = data->irq; + unsigned int prio = data->hwirq; raw_spin_lock(&core_irq_lock); or_creg(IER, 1 << prio); @@ -59,15 +57,15 @@ static struct irq_chip core_chip = { .irq_unmask = unmask_core_irq, }; +static int prio_to_virq[NR_PRIORITY_IRQS]; + asmlinkage void c6x_do_IRQ(unsigned int prio, struct pt_regs *regs) { struct pt_regs *old_regs = set_irq_regs(regs); irq_enter(); - BUG_ON(prio < 4 || prio >= NR_PRIORITY_IRQS); - - generic_handle_irq(prio); + generic_handle_irq(prio_to_virq[prio]); irq_exit(); @@ -82,6 +80,8 @@ static int core_domain_map(struct irq_domain *h, unsigned int virq, if (hw < 4 || hw >= NR_PRIORITY_IRQS) return -EINVAL; + prio_to_virq[hw] = virq; + irq_set_status_flags(virq, IRQ_LEVEL); irq_set_chip_and_handler(virq, &core_chip, handle_level_irq); return 0; @@ -102,9 +102,8 @@ void __init init_IRQ(void) np = of_find_compatible_node(NULL, NULL, "ti,c64x+core-pic"); if (np != NULL) { /* create the core host */ - core_domain = irq_domain_add_legacy(np, NR_PRIORITY_IRQS, - 0, 0, &core_domain_ops, - NULL); + core_domain = irq_domain_add_linear(np, NR_PRIORITY_IRQS, + &core_domain_ops, NULL); if (core_domain) irq_set_default_host(core_domain); of_node_put(np); |