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author | Hauke Mehrtens <hauke@hauke-m.de> | 2011-07-23 01:20:15 +0200 |
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committer | John W. Linville <linville@tuxdriver.com> | 2011-08-08 14:29:33 -0400 |
commit | a3e72cd2974a4b178d4edf6737ae51d1ea83b5d8 (patch) | |
tree | a8e1826269602da35090e5c69a1a2405baf24c49 /arch/mips/bcm47xx | |
parent | c1d1c5d4213ee96e054c4d195117368972a4c01f (diff) | |
download | kernel_goldelico_gta04-a3e72cd2974a4b178d4edf6737ae51d1ea83b5d8.zip kernel_goldelico_gta04-a3e72cd2974a4b178d4edf6737ae51d1ea83b5d8.tar.gz kernel_goldelico_gta04-a3e72cd2974a4b178d4edf6737ae51d1ea83b5d8.tar.bz2 |
bcm47xx: fix irq assignment for new SoCs.
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
Acked-by: Ralf Baechle <ralf@linux-mips.org>
Signed-off-by: John W. Linville <linville@tuxdriver.com>
Diffstat (limited to 'arch/mips/bcm47xx')
-rw-r--r-- | arch/mips/bcm47xx/irq.c | 12 |
1 files changed, 12 insertions, 0 deletions
diff --git a/arch/mips/bcm47xx/irq.c b/arch/mips/bcm47xx/irq.c index 325757a..8cf3833 100644 --- a/arch/mips/bcm47xx/irq.c +++ b/arch/mips/bcm47xx/irq.c @@ -26,6 +26,7 @@ #include <linux/interrupt.h> #include <linux/irq.h> #include <asm/irq_cpu.h> +#include <bcm47xx.h> void plat_irq_dispatch(void) { @@ -51,5 +52,16 @@ void plat_irq_dispatch(void) void __init arch_init_irq(void) { +#ifdef CONFIG_BCM47XX_BCMA + if (bcm47xx_bus_type == BCM47XX_BUS_TYPE_BCMA) { + bcma_write32(bcm47xx_bus.bcma.bus.drv_mips.core, + BCMA_MIPS_MIPS74K_INTMASK(5), 1 << 31); + /* + * the kernel reads the timer irq from some register and thinks + * it's #5, but we offset it by 2 and route to #7 + */ + cp0_compare_irq = 7; + } +#endif mips_cpu_irq_init(); } |