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| author | Anoop P A <anoop.pa@gmail.com> | 2011-01-25 13:52:05 +0530 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2011-03-25 18:45:14 +0100 |
| commit | 5027070b3ca2eb90adbf40c2d67f792818ae9077 (patch) | |
| tree | ad876c171a5bb7cf148b32bbc093ca86db69854d /arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h | |
| parent | 088f3876fc9234feca0cdfdf710b8fafa87bfce1 (diff) | |
| download | kernel_goldelico_gta04-5027070b3ca2eb90adbf40c2d67f792818ae9077.zip kernel_goldelico_gta04-5027070b3ca2eb90adbf40c2d67f792818ae9077.tar.gz kernel_goldelico_gta04-5027070b3ca2eb90adbf40c2d67f792818ae9077.tar.bz2 | |
MIPS: MSP71xx: Platform support for MSP on-chip USB controller.
Signed-off-by: Anoop P A <anoop.pa@gmail.com>
To: linux-mips@linux-mips.org
To: linux-kernel@vger.kernel.org
Cc: Anoop P A <anoop.pa@gmail.com>
Patchwork: https://patchwork.linux-mips.org/patch/2043/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h')
| -rw-r--r-- | arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h | 17 |
1 files changed, 9 insertions, 8 deletions
diff --git a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h index 603eb73..692c1b6 100644 --- a/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h +++ b/arch/mips/include/asm/pmc-sierra/msp71xx/msp_regs.h @@ -91,12 +91,10 @@ /* MAC C device registers */ #define MSP_ADSL2_BASE (MSP_MSB_BASE + 0xA80000) /* ADSL2 device registers */ -#define MSP_USB_BASE (MSP_MSB_BASE + 0xB40000) - /* USB device registers */ -#define MSP_USB_BASE_START (MSP_MSB_BASE + 0xB40100) - /* USB device registers */ -#define MSP_USB_BASE_END (MSP_MSB_BASE + 0xB401FF) - /* USB device registers */ +#define MSP_USB0_BASE (MSP_MSB_BASE + 0xB00000) + /* USB0 device registers */ +#define MSP_USB1_BASE (MSP_MSB_BASE + 0x300000) + /* USB1 device registers */ #define MSP_CPUIF_BASE (MSP_MSB_BASE + 0xC00000) /* CPU interface registers */ @@ -319,8 +317,11 @@ #define CPU_ERR2_REG regptr(MSP_SLP_BASE + 0x184) /* CPU/SLP Error status 1 */ -#define EXTENDED_GPIO_REG regptr(MSP_SLP_BASE + 0x188) - /* Extended GPIO register */ +/* Extended GPIO registers */ +#define EXTENDED_GPIO1_REG regptr(MSP_SLP_BASE + 0x188) +#define EXTENDED_GPIO2_REG regptr(MSP_SLP_BASE + 0x18c) +#define EXTENDED_GPIO_REG EXTENDED_GPIO1_REG + /* Backward-compatibility */ /* System Error registers */ #define SLP_ERR_STS_REG regptr(MSP_SLP_BASE + 0x190) |