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| author | David Daney <ddaney@caviumnetworks.com> | 2008-12-11 15:33:22 -0800 |
|---|---|---|
| committer | Ralf Baechle <ralf@linux-mips.org> | 2009-01-11 09:57:21 +0000 |
| commit | bd6d85c21a5adf24567fdb235aa8e7c8c95d5847 (patch) | |
| tree | 873767fba58ccbc1b4ae55aa8f16ef4b8ec5c246 /arch/mips/nxp/pnx8550 | |
| parent | 5b3b16880f404ca54126210ca86141cceeafc0cf (diff) | |
| download | kernel_goldelico_gta04-bd6d85c21a5adf24567fdb235aa8e7c8c95d5847.zip kernel_goldelico_gta04-bd6d85c21a5adf24567fdb235aa8e7c8c95d5847.tar.gz kernel_goldelico_gta04-bd6d85c21a5adf24567fdb235aa8e7c8c95d5847.tar.bz2 | |
MIPS: For Cavium OCTEON handle hazards as per the R10000 handling.
For Cavium CPU, we treat the same as R10000, in that all hazards
are dealt with in hardware.
Signed-off-by: Tomaso Paoletti <tpaoletti@caviumnetworks.com>
Signed-off-by: Paul Gortmaker <Paul.Gortmaker@windriver.com>
Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'arch/mips/nxp/pnx8550')
0 files changed, 0 insertions, 0 deletions