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| author | Akira Takeuchi <takeuchi.akr@jp.panasonic.com> | 2010-10-27 17:28:55 +0100 |
|---|---|---|
| committer | David Howells <dhowells@redhat.com> | 2010-10-27 17:28:55 +0100 |
| commit | 368dd5acd154b09c043cc4392a74da01599b37d5 (patch) | |
| tree | dd94ae3d044f6e774dec2437613515bd6b46dacb /arch/mn10300/proc-mn103e010/proc-init.c | |
| parent | 04157a6e7df99fd5ed64955233d6e00ab6613614 (diff) | |
| download | kernel_goldelico_gta04-368dd5acd154b09c043cc4392a74da01599b37d5.zip kernel_goldelico_gta04-368dd5acd154b09c043cc4392a74da01599b37d5.tar.gz kernel_goldelico_gta04-368dd5acd154b09c043cc4392a74da01599b37d5.tar.bz2 | |
MN10300: And Panasonic AM34 subarch and implement SMP
Implement the Panasonic MN10300 AM34 CPU subarch and implement SMP support for
MN10300. Also implement support for the MN2WS0060 processor and the ASB2364
evaluation board which are AM34 based.
Signed-off-by: Akira Takeuchi <takeuchi.akr@jp.panasonic.com>
Signed-off-by: Kiyoshi Owada <owada.kiyoshi@jp.panasonic.com>
Signed-off-by: David Howells <dhowells@redhat.com>
Diffstat (limited to 'arch/mn10300/proc-mn103e010/proc-init.c')
| -rw-r--r-- | arch/mn10300/proc-mn103e010/proc-init.c | 35 |
1 files changed, 35 insertions, 0 deletions
diff --git a/arch/mn10300/proc-mn103e010/proc-init.c b/arch/mn10300/proc-mn103e010/proc-init.c index 0cee787..27b9798 100644 --- a/arch/mn10300/proc-mn103e010/proc-init.c +++ b/arch/mn10300/proc-mn103e010/proc-init.c @@ -11,6 +11,7 @@ #include <linux/kernel.h> #include <asm/fpu.h> #include <asm/rtc.h> +#include <asm/busctl-regs.h> /* * initialise the on-silicon processor peripherals @@ -75,3 +76,37 @@ asmlinkage void __init processor_init(void) calibrate_clock(); } + +/* + * determine the memory size and base from the memory controller regs + */ +void __init get_mem_info(unsigned long *mem_base, unsigned long *mem_size) +{ + unsigned long base, size; + + *mem_base = 0; + *mem_size = 0; + + base = SDBASE(0); + if (base & SDBASE_CE) { + size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT; + size = ~size + 1; + base &= SDBASE_CBA; + + printk(KERN_INFO "SDRAM[0]: %luMb @%08lx\n", size >> 20, base); + *mem_size += size; + *mem_base = base; + } + + base = SDBASE(1); + if (base & SDBASE_CE) { + size = (base & SDBASE_CBAM) << SDBASE_CBAM_SHIFT; + size = ~size + 1; + base &= SDBASE_CBA; + + printk(KERN_INFO "SDRAM[1]: %luMb @%08lx\n", size >> 20, base); + *mem_size += size; + if (*mem_base == 0) + *mem_base = base; + } +} |