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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-26 19:46:23 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-02-26 19:46:23 -0800 |
| commit | a9a07d40bc9c57881555b64fe8bf66fd28e2f13a (patch) | |
| tree | 20c08b4e6756db92bf7720d5ca1af67b83430828 /arch/openrisc/kernel/entry.S | |
| parent | 2003cd90c473f66d34114bc61c49e7d74d370894 (diff) | |
| parent | 160d83781a32e94a1e337efd6722939001e62398 (diff) | |
| download | kernel_goldelico_gta04-a9a07d40bc9c57881555b64fe8bf66fd28e2f13a.zip kernel_goldelico_gta04-a9a07d40bc9c57881555b64fe8bf66fd28e2f13a.tar.gz kernel_goldelico_gta04-a9a07d40bc9c57881555b64fe8bf66fd28e2f13a.tar.bz2 | |
Merge branch 'for-upstream' of git://openrisc.net/jonas/linux
Pull OpenRISC updates from Jonas Bonn:
"An equal number of bug fixes and trivial cleanups; no new features.
- Two patches to fix errors thrown by the updated toolchain.
- Three other bug fixes.
- Four trivial cleanups."
* 'for-upstream' of git://openrisc.net/jonas/linux:
openrisc: add missing header inclusion
openrisc: really pass correct arg to schedule_tail
Add bitops include needed for ext2 filesystem
openrisc: update DTLB-miss handler last
openrisc: fix up vmalloc page table loading
openrisc idle: delete pm_idle
openrisc: remove CONFIG_SYMBOL_PREFIX
openrisc: avoid using function parameter regs in reset vector
openrisc: remove unused current_regs
Diffstat (limited to 'arch/openrisc/kernel/entry.S')
| -rw-r--r-- | arch/openrisc/kernel/entry.S | 16 |
1 files changed, 13 insertions, 3 deletions
diff --git a/arch/openrisc/kernel/entry.S b/arch/openrisc/kernel/entry.S index 54afd0a..d8a455e 100644 --- a/arch/openrisc/kernel/entry.S +++ b/arch/openrisc/kernel/entry.S @@ -201,12 +201,17 @@ EXCEPTION_ENTRY(_bus_fault_handler) l.nop /* ---[ 0x300: Data Page Fault exception ]------------------------------- */ +EXCEPTION_ENTRY(_dtlb_miss_page_fault_handler) + l.and r5,r5,r0 + l.j 1f + l.nop EXCEPTION_ENTRY(_data_page_fault_handler) /* set up parameters for do_page_fault */ + l.ori r5,r0,0x300 // exception vector +1: l.addi r3,r1,0 // pt_regs /* r4 set be EXCEPTION_HANDLE */ // effective address of fault - l.ori r5,r0,0x300 // exception vector /* * __PHX__: TODO @@ -276,12 +281,17 @@ EXCEPTION_ENTRY(_data_page_fault_handler) l.nop /* ---[ 0x400: Insn Page Fault exception ]------------------------------- */ +EXCEPTION_ENTRY(_itlb_miss_page_fault_handler) + l.and r5,r5,r0 + l.j 1f + l.nop EXCEPTION_ENTRY(_insn_page_fault_handler) /* set up parameters for do_page_fault */ + l.ori r5,r0,0x400 // exception vector +1: l.addi r3,r1,0 // pt_regs /* r4 set be EXCEPTION_HANDLE */ // effective address of fault - l.ori r5,r0,0x400 // exception vector l.ori r6,r0,0x0 // !write access /* call fault.c handler in or32/mm/fault.c */ @@ -1040,7 +1050,7 @@ ENTRY(_switch) * we are expected to have set up the arg to schedule_tail already, * hence we do so here unconditionally: */ - l.lwz r3,TI_STACK(r3) /* Load 'prev' as schedule_tail arg */ + l.lwz r3,TI_TASK(r3) /* Load 'prev' as schedule_tail arg */ l.jr r9 l.nop |