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| author | Stephen Warren <swarren@nvidia.com> | 2013-08-09 16:49:25 +0200 |
|---|---|---|
| committer | Stephen Warren <swarren@nvidia.com> | 2013-08-13 12:07:50 -0600 |
| commit | b02b07adb159166f57d5e66e67ab1ae9de254229 (patch) | |
| tree | ad0d00790f34d7f82d1c4e069a1c626eeaaa9da9 /arch/s390/Makefile | |
| parent | 94716cddbec6602643e2c7fe10f4385d951cf2f8 (diff) | |
| download | kernel_goldelico_gta04-b02b07adb159166f57d5e66e67ab1ae9de254229.zip kernel_goldelico_gta04-b02b07adb159166f57d5e66e67ab1ae9de254229.tar.gz kernel_goldelico_gta04-b02b07adb159166f57d5e66e67ab1ae9de254229.tar.bz2 | |
PCI: tegra: set up PADS_REFCLK_CFG1
The registers PADS_REFCLK_CFG are an array of 16-bit data, one entry per
PCIe root port. For Tegra30, we therefore need to write a 3rd entry in
this array. Doing so makes the mini-PCIe slot on Beaver operate correctly.
While we're at it, add some #defines to partially document the fields
within these 16-bit values.
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Signed-off-by: Stephen Warren <swarren@nvidia.com>
Diffstat (limited to 'arch/s390/Makefile')
0 files changed, 0 insertions, 0 deletions