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| author | Huang Ying <ying.huang@intel.com> | 2009-01-09 16:49:30 +1100 |
|---|---|---|
| committer | Herbert Xu <herbert@gondor.apana.org.au> | 2009-02-18 16:48:04 +0800 |
| commit | 109568e110ed67d4be1b28609b9fa00fca97f8eb (patch) | |
| tree | f40a1c6a35bb45abf7edcf8ab55ed75af6d405fb /arch/x86/crypto/aes-x86_64-asm_64.S | |
| parent | 8eb2dfac41c71701bb741f496f0cb7b7e4a3c3f6 (diff) | |
| download | kernel_goldelico_gta04-109568e110ed67d4be1b28609b9fa00fca97f8eb.zip kernel_goldelico_gta04-109568e110ed67d4be1b28609b9fa00fca97f8eb.tar.gz kernel_goldelico_gta04-109568e110ed67d4be1b28609b9fa00fca97f8eb.tar.bz2 | |
crypto: aes - Move key_length in struct crypto_aes_ctx to be the last field
The Intel AES-NI AES acceleration instructions need key_enc, key_dec
in struct crypto_aes_ctx to be 16 byte aligned, it make this easier to
move key_length to be the last one.
Signed-off-by: Huang Ying <ying.huang@intel.com>
Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au>
Diffstat (limited to 'arch/x86/crypto/aes-x86_64-asm_64.S')
| -rw-r--r-- | arch/x86/crypto/aes-x86_64-asm_64.S | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/arch/x86/crypto/aes-x86_64-asm_64.S b/arch/x86/crypto/aes-x86_64-asm_64.S index a120f52..7f28f62 100644 --- a/arch/x86/crypto/aes-x86_64-asm_64.S +++ b/arch/x86/crypto/aes-x86_64-asm_64.S @@ -56,13 +56,13 @@ .align 8; \ FUNC: movq r1,r2; \ movq r3,r4; \ - leaq BASE+KEY+48+4(r8),r9; \ + leaq BASE+KEY+48(r8),r9; \ movq r10,r11; \ movl (r7),r5 ## E; \ movl 4(r7),r1 ## E; \ movl 8(r7),r6 ## E; \ movl 12(r7),r7 ## E; \ - movl BASE+0(r8),r10 ## E; \ + movl BASE+480(r8),r10 ## E; \ xorl -48(r9),r5 ## E; \ xorl -44(r9),r1 ## E; \ xorl -40(r9),r6 ## E; \ |