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authorHaojian Zhuang <haojian.zhuang@gmail.com>2010-01-25 06:03:54 -0500
committerEric Miao <eric.y.miao@gmail.com>2010-03-02 07:40:56 +0800
commit16144bfb83bb8319c07c18b57eac15368708d02c (patch)
tree3544731005719bd1b2f9ba70efcb2233cf9437cf /arch
parent247b4592f385622774de877f568fc30eb37dc831 (diff)
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[ARM] mmp2: add gpio initialization
Signed-off-by: Haojian Zhuang <haojian.zhuang@marvell.com> Signed-off-by: Eric Miao <eric.y.miao@gmail.com>
Diffstat (limited to 'arch')
-rw-r--r--arch/arm/mach-mmp/common.h1
-rw-r--r--arch/arm/mach-mmp/irq-mmp2.c2
-rw-r--r--arch/arm/mach-mmp/mmp2.c23
3 files changed, 25 insertions, 1 deletions
diff --git a/arch/arm/mach-mmp/common.h b/arch/arm/mach-mmp/common.h
index 85bf124..18c037f 100644
--- a/arch/arm/mach-mmp/common.h
+++ b/arch/arm/mach-mmp/common.h
@@ -9,6 +9,7 @@ extern struct sys_timer pxa910_timer;
extern struct sys_timer mmp2_timer;
extern void __init pxa168_init_irq(void);
extern void __init pxa910_init_irq(void);
+extern void __init mmp2_init_icu(void);
extern void __init mmp2_init_irq(void);
extern void __init icu_init_irq(void);
diff --git a/arch/arm/mach-mmp/irq-mmp2.c b/arch/arm/mach-mmp/irq-mmp2.c
index ddebde8..3ae1c54 100644
--- a/arch/arm/mach-mmp/irq-mmp2.c
+++ b/arch/arm/mach-mmp/irq-mmp2.c
@@ -104,7 +104,7 @@ static void init_mux_irq(struct irq_chip *chip, int start, int num)
}
}
-void __init mmp2_init_irq(void)
+void __init mmp2_init_icu(void)
{
int irq;
diff --git a/arch/arm/mach-mmp/mmp2.c b/arch/arm/mach-mmp/mmp2.c
index 561194d..0f1c441 100644
--- a/arch/arm/mach-mmp/mmp2.c
+++ b/arch/arm/mach-mmp/mmp2.c
@@ -21,6 +21,7 @@
#include <mach/cputype.h>
#include <mach/irqs.h>
#include <mach/mfp.h>
+#include <mach/gpio.h>
#include <mach/devices.h>
#include "common.h"
@@ -28,12 +29,34 @@
#define MFPR_VIRT_BASE (APB_VIRT_BASE + 0x1e000)
+#define APMASK(i) (GPIO_REGS_VIRT + BANK_OFF(i) + 0x9c)
+
static struct mfp_addr_map mmp2_addr_map[] __initdata = {
MFP_ADDR(PMIC_INT, 0x2c4),
MFP_ADDR_END,
};
+static void __init mmp2_init_gpio(void)
+{
+ int i;
+
+ /* enable GPIO clock */
+ __raw_writel(APBC_APBCLK | APBC_FNCLK, APBC_MMP2_GPIO);
+
+ /* unmask GPIO edge detection for all 6 banks -- APMASKx */
+ for (i = 0; i < 6; i++)
+ __raw_writel(0xffffffff, APMASK(i));
+
+ pxa_init_gpio(IRQ_MMP2_GPIO, 0, 167, NULL);
+}
+
+void __init mmp2_init_irq(void)
+{
+ mmp2_init_icu();
+ mmp2_init_gpio();
+}
+
/* APB peripheral clocks */
static APBC_CLK(uart1, MMP2_UART1, 1, 26000000);
static APBC_CLK(uart2, MMP2_UART2, 1, 26000000);